M52S128168A-7.5TG ELITE SEMICONDUCTOR, M52S128168A-7.5TG Datasheet - Page 43

• Manufacturer Part Number: M52S128168A-7.5TG
• Description: IC, SDRAM, 128MBIT, 133MHZ, TSOP-54
• Manufacturer: ELITE SEMICONDUCTOR

Specifications of M52S128168A-7.5TG

• Memory Type: DRAM - Sychronous
• Memory Configuration: 2M X 16
• Ic Interface Type: Parallel
• Memory Case Style: TSOP
• No. Of Pins: 54
• Operating Temperature Range: 0°C To +70°C
• Frequency: 133MHz
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Page Size: 128MB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ESMT
Self Refresh Entry & Exit Cycle
* Note : TO ENTER SELF REFRESH MODE
Elite Semiconductor Memory Technology Inc.
1. CS , RAS & CAS with CKE should be low at the same clock cycle.
2. After 1 clock cycle, all the inputs including the system clock can be don’t care except for CKE.
3. The device remains in self refresh mode as long as CKE stays “Low”.
TO EXIT SELF REFRESH MODE
4. System clock restart and be stable before returning CKE high.
5. CS starts from high.
6. Minimum t
7. Burst auto refresh is required before self refresh entry and after self refresh exit if the
cf.) Once the device enters self refresh mode, minimum t
system uses burst refresh.
RFC
is required after CKE going high to complete self refresh exit.
RAS
is required before exit from self refresh.
Publication Date: Oct. 2007
Revision: 1.1
M52S128168A
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