DSPIC30F4012-20I/SO Microchip Technology, DSPIC30F4012-20I/SO Datasheet - Page 119

• Manufacturer Part Number: DSPIC30F4012-20I/SO
• Description: IC, DSC, 16BIT, 48KB 20MHZ, 5.5V, SOIC28
• Manufacturer: Microchip Technology
• Series: DsPIC30Fr

Specifications of DSPIC30F4012-20I/SO

• Core Frequency: 20MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 48KB
• Supply Voltage Range: 2.5V To 5.5V
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 20
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F401220ISO

TABLE 17-2:
I2CRCV
I2CTRN
I2CBRG
I2CCON
I2CSTAT
I2CADD
Legend:
Note
SFR Name Addr.
1:
0200
0202
0204
0206
0208
020A
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
ACKSTAT TRSTAT
I
2
I2CEN
Bit 15
C™ REGISTER MAP
—
—
—
—
Bit 14
—
—
—
—
—
I2CSIDL SCLREL IPMIEN
Bit 13
—
—
—
—
—
(1)
Bit 12
—
—
—
—
—
Bit 11
—
—
—
—
—
Bit 10
A10M
BCL
—
—
—
—
GCSTAT ADD10
DISSLW
Bit 9
—
—
—
SMEN
Bit 8
—
—
IWCOL
GCEN
Bit 7
STREN
I2COV
Bit 6
Address Register
ACKDT
Bit 5
D_A
Baud Rate Generator
Transmit Register
Receive Register
ACKEN
Bit 4
P
RCEN
Bit 3
S
Bit 2
R_W
PEN
RSEN
Bit 1
RBF
Bit 0
SEN
TBF
0000 0000 0000 0000
0000 0000 1111 1111
0000 0000 0000 0000
0001 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Reset State