DC1241B-BA Linear Technology, DC1241B-BA Datasheet - Page 19

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DC1241B-BA

Manufacturer Part Number
DC1241B-BA
Description
BOARD EVAL LTM9001-BA
Manufacturer
Linear Technology
Type
Baseband Receiverr
Datasheets

Specifications of DC1241B-BA

Design Resources
DC1241B Schematic
Frequency
0Hz ~ 300MHz
Features
LTM9001 16bit Receiver Subsystem, DC-300MHz LPF
Tool / Board Applications
Wireless Connectivity-ZigBee, RF, Infrared, USB
Mcu Supported Families
LTM9001
Development Tool Type
Hardware - Eval/Demo Board
For Use With/related Products
LTM9001
Lead Free Status / RoHS Status
Not applicable / Not applicable
OPERATION
ADC INPUT NETWORK
The passive network between the amplifi er output stage
and the ADC input stage can be confi gured for bandpass
or lowpass response with different cutoff frequencies and
bandwidths. The LTM9001-AA, for example, implements
a 2-pole bandpass fi lter centered at 162.5MHz with
50MHz bandwidth. Note that the fi lter attenuates the
signal at 162.5MHz by 1dB, making the overall gain of
the subsystem 19dB.
For production test purposes the fi lter is designed to allow
DC inputs into the ADC.
APPLICATIONS INFORMATION
INPUT SPAN
The LTM9001 is confi gured with a fi xed input span and
input impedance. With the amplifi er gain and the ADC
input network described above for LTM9001-AA, the full-
scale input range of the driver circuit is 233mV
recommended ADC input span is achieved by tying the
SENSE pin to V
changed by applying a DC voltage to the SENSE pin.
Input Impedance and Matching
The differential input impedance of the LTM9001 can be
50Ω, 200Ω or 400Ω. In some applications the differential
inputs may need to be terminated to a lower value imped-
ance, e.g. 50Ω, in order to provide an impedance match
for the source. Several choices are available.
One approach is to use a differential shunt resistor
(Figure 2). Another approach is to employ a wide band
transformer (Figure 3). Both methods provide a wide band
match. The termination resistor or the transformer must
be placed close to the input pins in order to minimize the
refl ection due to input mismatch.
Table 2. Differential Amplifi er Input Termination Values
400Ω
200Ω
50Ω
Z
IN
DD
. However, the ADC input span can be
R
66.5Ω
T
None
57Ω
FIG 2
P-P
. The
CONVERTER INFORMATION
The analog-to-digital converter (ADC) is a CMOS pipelined
multistep converter with a front-end PGA. As shown in the
Functional Block Diagram, the converter has fi ve pipelined
ADC stages; a sampled analog input will result in a digitized
value seven cycles later (see the Timing Diagram section).
The encode input is differential for improved common
mode noise immunity.
Figure 2. Input Termination for Differential 50Ω Input Impedance
Using Shunt Resistor (See Table 2 for R
+
LTM9001-Ax/LTM9001-Bx
Figure 3. Input Termination for Differential 50Ω
Input Impedance Using a Wideband Transformer
V
25Ω
25Ω
IN
+
V
25Ω
25Ω
IN
R
IN
IN
IN
IN
T
+
+
Z
Z
Z
Z
IN
IN
IN
IN
/2
/2
/2
/2
R
R
R
R
T
F
F
F
F
Values)
LTM9001
LTM9001
9001 F02
9001 F03
19
9001fc

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