CP2110EK Silicon Laboratories Inc, CP2110EK Datasheet - Page 20
![KIT EVAL FOR CP2110](/photos/18/31/183133/cp2110ek_sml.jpg)
CP2110EK
Manufacturer Part Number
CP2110EK
Description
KIT EVAL FOR CP2110
Manufacturer
Silicon Laboratories Inc
Specifications of CP2110EK
Main Purpose
Interface, USB 2.0 to UART (RS485) Bridge
Embedded
No
Utilized Ic / Part
CP2110
Primary Attributes
Full Speed (12Mbps)
Secondary Attributes
LED Status Indicators
Interface Type
RS-232, USB
Operating Supply Voltage
3.3 V
Product
Interface Development Tools
For Use With/related Products
CP2110
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-2003
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CP2110EK
Manufacturer:
SiliconL
Quantity:
16
CP2110
Alternatively, if 3.0 to 3.6 V power is supplied to the V
device with the voltage regulator bypassed. For this configuration, tie the REGIN input to V
regulator. A typical connection diagram showing the device in a self-powered application with the regulator
bypassed is shown in Figure 9.
The USB max power and power attributes descriptor must match the device power usage and configuration. See
application note “AN144: CP21xx Customization Guide” for information on how to customize USB descriptors for
the CP2110.
20
Connector
Note 1 : VIO can be connected directly to VDD or to a supply as low as 1.8 V to set the I/O interface
Note 2 : Avalanche transient voltage suppression diodes compatible with Full-speed USB should be
Note 3 : An external pull-up is not required, but can be added for noise immunity.
Note 4 : If programming the configuration ROM via USB, add a 4.7 F capacitor between VPP
USB
VBUS
Power
GND
3.3 V
D+
D-
voltage.
added at the connector for ESD protection. Use Littelfuse p/n SP0503BAHT or equivalent.
circuitry, and ensure that VDD is at least 3.3 V.
and ground. During a programming operation, do not connect the VPP pin to other
Figure 9. Typical Self-Powered Connection Diagram (Regulator Bypass)
1-5 F
Note 2
Note 1
0.1 F
VIO
VDD
REGIN
GND
VBUS
D+
D-
Rev. 1.0
DD
pin, the CP2110 can function as a USB self-powered
CP2110
GPIO.3_RS485
GPIO.1_RTS
GPIO.2_CTS
GPIO.5_RXT
GPIO.0_CLK
GPIO.4_TXT
SUSPEND
SUSPEND
GPIO.7
GPIO.8
GPIO.9
GPIO.6
RST
VPP
RX
TX
DD
to bypass the voltage
VIO
and GPIO
Suspend
Standard
Signals
Signals
4.7 F
UART
Note 3
4.7 k
Note 4