CP2110EK Silicon Laboratories Inc, CP2110EK Datasheet - Page 15

• Manufacturer Part Number: CP2110EK
• Description: KIT EVAL FOR CP2110
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2110EK

• Main Purpose: Interface, USB 2.0 to UART (RS485) Bridge
• Embedded: No
• Utilized Ic / Part: CP2110
• Primary Attributes: Full Speed (12Mbps)
• Secondary Attributes: LED Status Indicators
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3.3 V
• Product: Interface Development Tools
• For Use With/related Products: CP2110
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 336-2003

7. GPIO Pins
The CP2110 supports 10 user-configurable GPIO pins. Each of these GPIO pins are usable as inputs, open-drain
outputs, or push-pull outputs. Six of these GPIO pins also have alternate functions which are listed in Table 11.
More information regarding the configuration and usage of these pins is available in “AN144: CP21xx
Customization Guide” available on the Silicon Labs website.
The default configuration for all of the GPIO pins is provided in Table 12. The configuration of the pins is one-time
programmable for each device. See Section 8 for more information about programming the GPIO pin functionality.
The difference between an open-drain output and a push-pull output is when the GPIO output is driven to logic
high. A logic high, open-drain output pulls the pin to the VIO rail through an internal, pull-up resistor. A logic high,
push-pull output directly connects the pin to the VIO voltage. Open-drain outputs are typically used when
interfacing to logic at a higher voltage than the VIO pin. These pins can be safely pulled to the higher, external
voltage through an external pull-up resistor. The maximum external pull-up voltage is 5 V.
The speed of reading and writing the GPIO pins is subject to the timing of the USB bus. GPIO pins configured as
inputs or outputs are not recommended for real-time signalling.
GPIO Pin
GPIO.0
GPIO.1
GPIO.2
GPIO.3
GPIO.4
RS-485 Transceiver Control
Default Function
GPIO Input
TX Toggle
Table 12. GPIO Pin Default Configuration
RTS
CTS
Table 11. GPIO Pin Alternate Functions
GPIO Pin
GPIO.0
GPIO.1
GPIO.2
GPIO.3
GPIO.4
GPIO.5
RS-485 Transceiver Control
Rev. 1.0
Alternate Function
CLK Output
RX Toggle
TX Toggle
CTS
RTS
GPIO Pin
GPIO.5
GPIO.6
GPIO.7
GPIO.8
GPIO.9
GPIO Push-Pull Output
GPIO Push-Pull Output
Default Function
GPIO Input
GPIO Input
RX Toggle
CP2110
15