TWR-ADCDAC-LTC Freescale Semiconductor, TWR-ADCDAC-LTC Datasheet - Page 49

• Manufacturer Part Number: TWR-ADCDAC-LTC
• Description: MOD ADC DAC TOWER LINEAR TECH
• Manufacturer: Freescale Semiconductor
• Type: A/Dr

Specifications of TWR-ADCDAC-LTC

• Main Purpose: Data Conversion, ADC, DAC
• Embedded: No
• Utilized Ic / Part: LTC1859, LTC2498, LTC2600, LTC2704, LTC3471
• Primary Attributes: 2 Analog to Digital Converters, 2 Digital to Analog Converters
• Secondary Attributes: For use with Freescale Tower System
• Maximum Clock Frequency: 50 MHz
• Interface Type: Touch Sense, ULPI, UART, IrDA, I2S,
• Product: Data Conversion Development Tools
• Silicon Manufacturer: Freescale
• Silicon Core Number: LTC2704, LTC2600, LTC1859, LTC2498, LTC3471 & LTC6655-5
• Kit Application Type: Data Converter
• Application Sub Type: ADC, DAC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Kinetis MCU
• Lead Free Status / Rohs Status: Compliant

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individual clock gating
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Two oscillator options
“On-the-fly” clock dividers with
Low power boot option
 System
 RTC
 Core/Platform Clock
 Peripheral Bus Clock
 FlexBus Clock
 Flash Clock
 USB Clock
 User non-volatile register bit forces all clock
dividers to maximum allowable dividers on system
reset or POR for reduced average boot current.
• kHz & MHz range
• Operates from System power domain
• kHz range
• Can be system oscillator
• Operates from RTC VBAT power domain
• Can operate 1:1 ratio to Core/Platform
Clock up to maximum 50 MHz
• Clock to most peripherals
• Maximum 50 MHz
• Maximum 25 MHz
• Maximum 48 MHz
• Fractional clock divider
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clock ratio up to 50 MHz improves
peripheral performance while
reducing overall power consumption
►
unused peripheral clocks to further
minimize current consumption
High Level Clocking System
1:1 peripheral bus to core/platform
Clock gating allows an application
50
TM