IDTTSE2002B3CNRG8 IDT, Integrated Device Technology Inc, IDTTSE2002B3CNRG8 Datasheet - Page 25

• Manufacturer Part Number: IDTTSE2002B3CNRG8
• Description: IC TEMP SENS EEPROM DFN-8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDTTSE2002B3CNRG8

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Control Logic, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -20°C ~ 125°C
• Output Type: 2-Wire Serial, I²C™/SMBUS™
• Output Alarm: No
• Output Fan: No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -20°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-VFDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-2033-2

HYST Bit Decode
the lock bits is set, this bit cannot be set until unlocked. However it can be cleared at any time. When in shutdown mode, the TSE2002B3C still
responds to commands normally, however bus timeout may or may not be supported in this mode.
altered.
this bit cannot be altered.
Bit 8 – SHDN-Shutdown. The thermal sensing device and A/D converters are disabled to save power, no events will be generated. When either of
Bit 7 – TCRIT_LOCK; Locks the TCRIT Limit Register from being updated.
Bit 6 – EVENT_LOCK; Locks the High and Low Limit Registers from being updated.
Bit 5 – CLEAR; Clears the EVENT pin when it has been asserted. This bit is write only and will always read '0'.
Bit 4 – EVENT_STS; Indicates if the EVENT pin is asserted. This bit is read only.
Bit 3 – EVENT_CTRL; Masks the EVENT pin from generating an interrupt. If either of the lock bits are set (bit 7 and bit 6), then this bit cannot be
Bit 2 – TCRIT_ONLY; Controls whether the EVENT pin will be asserted from a high / low out-of-limit condition. When the EVENT_LOCK bit is set,
Bit 1 – EVENT_POL; Controls the “active” state of the EVENT pin. The EVENT pin is driven to this state when it is asserted.
1
0
0
1
1
'0' (default); The temperature monitor is active and converting
'1'; The temperature monitor is disabled and will not generate interrupts or update the temperature data.
'0' (default; The TCRIT Limit Register can be updated normally.
'1'; The TCRIT Limit Register is locked and cannot be updated. Once this bit has been set, it cannot be cleared until an internal
power on reset.
'0' (default); The High and Low Limit Registers can be updated normally.
'1'; The High and Low Limit Registers are locked and cannot be updated. Once this bit has been set, it cannot be cleared until
an internal power on reset.
'0'; does nothing
'1'; The EVENT pin is released and will not be asserted until a new interrupt condition occurs. This bit is ignored if the device
is operating in Comparator Mode. This bit is self clearing.
‘0' (default); The EVENT pin is not asserted.
'1'; The EVENT pin is being asserted by the device.
'0' (default); The EVENT pin is disabled and will not generate interrupts.
'1'; The EVENT pin is enabled.
'0' (default); The EVENT pin will be asserted if the measured temperature is above the High Limit or below the Low Limit in
addition to if the temperature is above the TCRIT Limit.
'1'; The EVENT pin will only be asserted if the measured temperature is above the TCRIT Limit.
HYST[1:0]
0
0
1
0
1
Disable hysteresis (default)
1.5°C
3°C
6°C
Hysteresis
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May 12, 2010