STLM75M2E STMicroelectronics, STLM75M2E Datasheet - Page 14

IC TEMP SENSOR DIGITAL SO-8

STLM75M2E

Manufacturer Part Number
STLM75M2E
Description
IC TEMP SENSOR DIGITAL SO-8
Manufacturer
STMicroelectronics
Datasheet

Specifications of STLM75M2E

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Function
Temp Sensor, Watchdog
Topology
ADC (Sigma Delta), Comparator, Register Bank
Sensor Type
Internal
Sensing Temperature
-55°C ~ 125°C
Output Type
I²C™/SMBus™
Output Alarm
Yes
Output Fan
No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Full Temp Accuracy
+/- 3 C
Digital Output - Bus Interface
Serial (2-Wire, I2C)
Digital Output - Number Of Bits
9 bit
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Ic Output Type
Digital
Sensing Accuracy Range
± 0.5°C
Temperature Sensing Range
-55°C To +125°C
Supply Current
125µA
Supply Voltage Range
2.7V To 5.5V
Sensor Case Style
SOIC
No. Of Pins
8
Rohs Compliant
Yes
For Use With
497-10508 - BOARD EVAL FOR MEMS SENSORS497-10048 - BOARD EVAL ACCELEROMETER497-6238 - BOARD STLM75/STDS75/ST72F651
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Operation
2.5
Note:
2.6
14/40
Fault tolerance
For both comparator and interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS output will be activated. Fault tolerance refers to the number of
consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (4 and 3) in the configuration register. These
bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in
these bits both default to logic '0'.
Table 2.
OS output will be asserted one t
condition remains.
Shutdown mode
For power-sensitive applications, the STLM75 offers a low-power shutdown mode. The SD
bit in the configuration register controls shutdown mode. When SD is changed to logic '1,'
the conversion in progress will be completed and the result stored in the temperature
register, after which the STLM75 will go into a low-power standby state. The OS output will
be cleared if the thermostat is operating in Interrupt mode and the OS will remain
unchanged in comparator mode. The 2-wire interface remains operational in shutdown
mode, and writing a '0' to the SD bit returns the STLM75 to normal operation.
FT1
0
0
1
1
FT0
0
1
0
1
Fault tolerance setting
STLM75 (consecutive faults)
1
2
4
6
Doc ID 13296 Rev 12
CONV
after fault tolerance is met, provided that the error
Power-up default
Comments
Table
2. At power-up,
STLM75

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