LE24LB642CSTL-TFM-H SANYO, LE24LB642CSTL-TFM-H Datasheet - Page 7

• Manufacturer Part Number: LE24LB642CSTL-TFM-H
• Description: IC EEPROM 64KBIT 400KHZ WLP6
• Manufacturer: SANYO

Specifications of LE24LB642CSTL-TFM-H

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 64K (8K x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 6-XFBGA, 6-WLBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 869-1238-2; LE24LB642CS-TFM-H

SDA
6-3. Acknowledge polling
7 EEPROM read operations
7-1. Current address reading
SDA
The address equivalent to the memory address accessed last +1 is held as the internal address of the EEPROM for
both write* and read operations. Therefore, provided that the master device has recognized the position of the
EEPROM address pointer, data can be read from the memory address with the current address pointer without
specifying the word address.
As with writing, current address reading involves receiving the 7-bit device address and read command code “1”
following the start condition, at which time the EEPROM generates an acknowledge signal. After this, the 8-bit data
of the (n+1) address is output serially starting with the highest bits. After the 8 bits have been output, by not sending
an acknowledge signal and inputting the stop condition, the EEPROM completes the read operation and is set to
standby mode.
If the previous read address is the last address, the address for the current address reading is rolled over to become
address 0.
*: If the write data is 1 or more bytes but less than 32 bytes, the current address after page writing is the address
equivalent to the number of bytes to be written in the specified word address +1. If the write data is 32 or more bytes,
it is the designated word address. If the last address (A4-A0=11111b) on the page has been designated by byte write
as the word address, the first address (A4-A0=00000b) on the page serves as the internal address after writing.
Acknowledge polling is used to find out when the EEPROM internal write operation is completed. When the stop
condition is received and the EEPROM starts rewriting, all operations are prohibited, and no response can be given to
the signals sent by the master device. Therefore, in order to find out when the EEPROM internal write operation is
completed, the start condition, device address and write command code are sent from the master device to the
EEPROM (slave device), and the response of the slave device is detected.
In other words, if the slave device does not send the acknowledge signal, it means that the internal write operation is
in progress; conversely, if it does send the acknowledge signal, it means that the internal write operation has been
completed.
When codes are sent by the master device during acknowledge polling, if a write or random read is to be performed
next, the write command "0" is executed. If a current read or sequential read is to be performed next, the read
command "1" is executed. After the write command "0" is executed and ACK="L" is confirmed, the start
condition/stop condition is entered to cancel the command and change to standby mode.
1
1
0 1 0
ACK
D7 D6
0 1 0
Data(n+1)
-
SDA
S2
S2
D1 D0
S1
S1
S0
S0
During Write
ACK
W
1
W
R/W
R/W
0 1 0
ACK
Device Address
• • • • •
*
NO ACK
*
1
S2
*
0 1 0
12
A
S1
ACK
LE24LB642CS
D7 D6
11
A
S0
10
A
R
S2
R/W
A9 A8
-
S1
D1 D0
ACK
D7 D6 D5 D4 D3 D2 D1 D0
S0
Word Address(n)
During Write
ACK
A7 A6 A5 A4 A3 A2 A1 A0
W
R/W
Data(n+1)
NO ACK
D7 D6
-
D1 D0
1
NO ACK
0 1 0
ACK
D7 D6 D5 D4 D3 D2 D1 D0
ACK
D7 D6
S2
Data(n+x)
S1
-
Data(n)
D1 D0
S0
End of Write
W
No.A1464-7/11
R/W
ACK
ACK
*: don’t care
• • • • •
ACK