74AVC20T245DGG,118 NXP Semiconductors, 74AVC20T245DGG,118 Datasheet - Page 2

TXRX 20BIT TRANSLAT 56TSSOP

74AVC20T245DGG,118

Manufacturer Part Number
74AVC20T245DGG,118
Description
TXRX 20BIT TRANSLAT 56TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AVC20T245DGG,118

Logic Family
74AVC
Number Of Channels Per Chip
2
Propagation Delay Time
6 ns, 11.8 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Package / Case
TSSOP-56
Maximum Power Dissipation
600 mW
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5250-2
NXP Semiconductors
3. Ordering information
Table 1.
[1]
4. Functional diagram
74AVC20T245
Product data sheet
Type number
74AVC20T245DGG 40 C to +125 C
74AVC20T245DGV 40 C to +125 C
74AVC20T245BQ
Fig 1.
Also known as TVSOP56.
Logic diagram
Ordering information
1DIR
1A1
Package
Temperature range Name
40 C to +125 C
V
CC(A)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
OFF
to other nine channels
120 Mbit/s ( 1.1 V to 1.5 V translation)
100 Mbit/s ( 1.1 V to 1.2 V translation)
circuitry provides partial Power-down mode operation
All information provided in this document is subject to legal disclaimers.
TSSOP56
TSSOP56
HXQFN60U plastic thermal enhanced extremely thin quad flat
V
Rev. 4 — 24 November 2010
CC(B)
[1]
1OE
1B1
Description
plastic thin shrink small outline package; 56 leads;
body width 6.1 mm
plastic thin shrink small outline package; 56 leads;
body width 4.4 mm
package; no leads; 60 terminals; UTLP based; body
4 x 6 x 0.5 mm
2DIR
2A1
20-bit dual supply translating transceiver; 3-state
V
CC(A)
to other nine channels
74AVC20T245
V
CC(B)
001aal240
2OE
2B1
© NXP B.V. 2010. All rights reserved.
Version
SOT364-1
SOT481-2
SOT1134-1
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