74AVC20T245DGG,118 NXP Semiconductors, 74AVC20T245DGG,118 Datasheet - Page 15

TXRX 20BIT TRANSLAT 56TSSOP

74AVC20T245DGG,118

Manufacturer Part Number
74AVC20T245DGG,118
Description
TXRX 20BIT TRANSLAT 56TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AVC20T245DGG,118

Logic Family
74AVC
Number Of Channels Per Chip
2
Propagation Delay Time
6 ns, 11.8 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Package / Case
TSSOP-56
Maximum Power Dissipation
600 mW
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5250-2
NXP Semiconductors
11. Waveforms
Table 14.
[1]
[2]
74AVC20T245
Product data sheet
Supply voltage
V
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Fig 5.
Fig 6.
CC(A)
V
V
CCI
CCO
, V
is the supply voltage associated with the data input port.
CC(B)
is the supply voltage associated with the output port.
Measurement points are given in
The data input (nAn, nBn) to output (nBn, nAn) propagation delay times
Measurement points are given in
Enable and disable times
V
V
OL
OL
Measurement points
and V
and V
OH
OH
are typical output voltage levels that occur with the output load.
are typical output voltage levels that occur with the output load.
HIGH-to-OFF
OFF-to-HIGH
Input
V
0.5V
0.5V
0.5V
LOW-to-OFF
OFF-to-LOW
nOE input
M
output
output
CCI
CCI
CCI
[1]
nBn, nAn output
nAn, nBn input
V
GND
GND
V
Table
CCO
Table
V
OH
OL
V
All information provided in this document is subject to legal disclaimers.
I
GND
14.
14.
V
V
OH
OL
V
I
Rev. 4 — 24 November 2010
V
M
enabled
Output
V
0.5V
0.5V
0.5V
t
outputs
PLZ
t
PHZ
M
CCO
CCO
CCO
V
[2]
V
M
X
V
V
Y
M
t
PHL
20-bit dual supply translating transceiver; 3-state
disabled
outputs
V
V
V
V
X
OL
OL
OL
t
PZL
t
PZH
+ 0.1 V
+ 0.15 V
+ 0.3 V
001aak285
t
PLH
V
M
V
001aak286
M
outputs
enabled
74AVC20T245
V
V
V
V
Y
OH
OH
OH
© NXP B.V. 2010. All rights reserved.
 0.1 V
 0.15 V
 0.3 V
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