74AVC16T245DGG,118 NXP Semiconductors, 74AVC16T245DGG,118 Datasheet - Page 14

• Manufacturer Part Number: 74AVC16T245DGG,118
• Description: TXRX 16BIT TRANSLAT 48TSSOP
• Manufacturer: NXP Semiconductors

Specifications of 74AVC16T245DGG,118

• Logic Family: 74AVC
• Number Of Channels Per Chip: 2
• Propagation Delay Time: 6 ns, 11.8 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 0.8 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TSSOP-48
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-5248-2

NXP Semiconductors
Table 13.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
74AVC16T245_2
Product data sheet
Symbol Parameter
V
t
t
t
V
t
t
t
V
t
t
t
V
t
t
t
V
t
t
t
pd
dis
en
pd
dis
en
pd
dis
en
pd
dis
en
pd
dis
en
CC(A)
CC(A)
CC(A)
CC(A)
CC(A)
t
pd
is the same as t
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
Dynamic characteristics for temperature range −40 °C to +125 °C
PLH
and t
Conditions
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
PHL
; t
dis
is the same as t
1.2 V ± 0.1 V
Min
1.0
1.0
1.0
1.0
0.5
0.5
1.5
1.5
1.0
1.1
0.5
0.5
1.5
1.5
0.5
0.5
1.5
1.5
1.0
1.0
0.5
0.5
1.0
0.5
0.5
0.5
0.5
0.5
0.5
0.5
All information provided in this document is subject to legal disclaimers.
Max
10.2
10.2
12.8
13.8
16.0
16.4
10.1
12.6
11.2
14.9
12.3
14.3
11.7
13.8
11.4
13.7
9.6
7.6
9.4
6.6
8.5
8.6
9.1
5.7
6.8
5.9
8.8
5.4
5.5
4.8
Rev. 02 — 30 March 2010
PLZ
and t
1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V
Min
0.5
0.5
1.5
1.5
1.0
1.1
0.5
0.5
1.5
1.5
1.0
1.0
0.5
0.5
1.5
1.5
1.0
1.0
0.5
0.5
1.0
1.0
0.5
0.5
0.5
0.5
0.5
1.0
0.5
0.5
PHZ
; t
en
Max
12.8
10.7
16.0
12.1
10.1
11.2
11.2
10.2
10.4
10.3
7.6
9.6
6.9
6.9
9.6
6.5
5.8
8.5
9.3
8.6
6.2
4.6
6.8
8.7
5.9
6.1
4.1
5.5
8.5
4.8
is the same as t
16-bit dual supply translating transceiver; 3-state
Figure
Min
0.5
0.5
1.5
1.5
1.0
1.1
0.5
0.5
1.5
1.5
1.0
0.5
0.5
0.5
1.5
1.5
1.0
0.5
0.5
0.5
1.0
1.0
0.5
0.5
0.5
0.5
0.5
1.0
0.5
0.5
8; for wave forms see
V
CC(B)
PZL
Max
12.8
10.5
16.0
10.6
10.1
11.2
6.6
9.4
5.8
6.5
8.3
9.0
5.3
5.3
8.5
7.9
8.6
8.2
5.1
4.1
6.8
7.3
5.9
8.1
4.9
3.7
5.5
7.2
4.7
8.0
[1]
and t
PZH
Min
0.5
0.5
1.5
1.0
1.0
1.0
0.5
0.5
1.5
1.0
1.0
0.5
0.5
0.5
1.5
1.0
1.0
0.5
0.5
0.5
1.0
1.0
0.5
0.5
0.5
0.5
0.5
1.0
0.5
0.5
.
74AVC16T245
Max
12.8
16.0
10.1
Figure 6
11.2
5.7
9.1
9.0
9.0
4.6
6.2
7.2
6.5
4.1
5.0
8.5
6.5
8.6
5.9
3.7
3.8
6.8
6.8
5.9
5.7
3.6
3.2
5.5
5.8
4.6
5.4
3.3 V ± 0.3 V
© NXP B.V. 2010. All rights reserved.
Min
0.5
0.5
1.5
1.5
1.0
1.0
0.5
0.5
1.5
1.0
1.0
0.5
0.5
0.5
1.5
1.0
1.0
0.5
0.5
0.5
1.0
1.0
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
and
Figure 7
Max
12.8
16.0
10.1
11.2
5.4
8.8
9.8
8.5
4.1
6.1
7.0
5.8
3.7
4.9
8.5
6.3
8.6
5.0
3.1
3.6
6.8
5.8
5.9
5.0
3.0
3.0
5.5
5.5
4.4
4.4
14 of 28
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns