MCZ33905BS3EK Freescale Semiconductor, MCZ33905BS3EK Datasheet - Page 78

• Manufacturer Part Number: MCZ33905BS3EK
• Description: IC SBC CAN HS 3.3V 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905BS3EK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

78
33903/4/5
SERIAL PERIPHERAL INTERFACE
DETAIL OF CONTROL BITS AND REGISTER MAPPING
Table 32. CAN Register
Notes
35.
[b_15 b_14] 10_000 [P/N]
MOSI First byte [15-8]
b7 b6
b5 b4
Bits
Condition for default
00
01
10
11
00
01
10
11
b3
b0
0
1
0
1
The first time the device is set to Normal Mode, the CAN is in Sleep Wake-Up enabled (bit7 = 1, bit 6 =0). The next time the device is
set in Normal Mode, the CAN state is controlled by bits 7 and 6.
01 10_ 000P
Default state
CAN mod[1], CAN mod[0] - CAN interface mode control, Wake-Up enable / disable
CAN interface in Sleep Mode, CAN Wake-Up disable.
CAN interface in receive only mode, CAN driver disable.
CAN interface is in Sleep Mode, CAN Wake-Up enable. In device LP Mode,
CAN Wake-Up is reported by device Wake-Up. In device Normal Mode, CAN Wake-Up reported by INT.
CAN interface in transmit and receive mode.
Slew[1] Slew[0] - CAN driver slew rate selection
FAST
MEDIUM
SLOW
SLOW
Wake-up 1/3 - Selection of CAN Wake-Up mechanism
3 dominant pulses Wake-Up mechanism
Single dominant pulse Wake-Up mechanism
CAN INT - Select the CAN failure detection reporting
Select INT generation when a bus failure is fully identified and decoded (i.e. after 5 dominant pulses on TxCAN)
Select INT generation as soon as a bus failure is detected, event if not fully identified
(35)
CAN mod[1]
bit 7
1
note
CAN mod[0]
bit 6
0
Slew[1]
bit 5
0
POR
Description
MOSI Second Byte, bits 7-0
Slew[0]
bit 4
0
Wake-Up 1/3
bit 3
POR
0
Analog Integrated Circuit Device Data
bit 2
-
-
Freescale Semiconductor
bit 1
-
-
CAN int
POR
bit 0
0