MCZ33905BS3EK Freescale Semiconductor, MCZ33905BS3EK Datasheet - Page 16

• Manufacturer Part Number: MCZ33905BS3EK
• Description: IC SBC CAN HS 3.3V 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905BS3EK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2. 33903/4/5 Pin Definitions (continued)
16
33903/4/5
PIN CONNECTIONS
33905D
EX PAD EX PAD EX PAD EX PAD EX PAD EX PAD
54 Pin
A functional description of each pin can be found in the
39
40
41
42
43
44
45
46
47
48
49
50
51
33905S
32 Pin
20
21
22
23
24
25
26
27
28
29
30
31
32
32 Pin
33904
20
21
22
23
24
25
26
27
28
29
30
31
32
32 Pin
33903
N/A
N/A
N/A
N/A
22
23
24
25
26
27
28
29
30
33903D
32 Pin
N/A
22
23
24
25
26
27
28
29
30
31
32
1
33903S
32 Pin
N/A
22
23
24
25
26
27
28
29
30
31
32
1
Pin Name
VSENSE
SCLK
MOSI
MISO
I/O-1
GND
VDD
RXD
RST
TXD
INT
CS
VE
VB
Functional Pin Description
Function
Ground
Output
Output
Output
Output
Output
Output
Output
Input/
Input
Input
Input
Input
Input
Pin
Transmit Data CAN bus transmit data input. Internal
(Active LOW)
(Active LOW)
(Active LOW)
Receive Data
Reset Output
Voltage Base
Input Output
Digital Drain
Sense input
Master Out /
Chip Select
Serial Data
Master In /
Slave Out
Interrupt
Slave In
Formal
Voltage
Voltage
Ground
Emitter
Output
Name
Clock
1
section beginning on
Analog Integrated Circuit Device Data
Direct battery voltage input sense. A
serial resistor is required to limit the input
current during high voltage transients.
Configurable pin as an input or output,
for connection to external circuitry
(switched or small load). The voltage
level can be read by the SPI and the
MUX output pin. The input can be used
as a programmable Wake-Up input in
(LP) Mode. It can be used in association
with
I/O-0 for a cyclic sense function in (LP)
Mode.
This is the device reset output whose
main function is to reset the MCU. This
pin has an internal pull-up to VDD
reset input voltage is also monitored in
order to detect external reset and safe
conditions.
This output is asserted low when an
enabled interrupt condition occurs. This
pin is an open drain structure with an
internal pull up resistor to VDD.
Chip select pin for the SPI. When the CS
is low, the device is selected. In (LP)
Mode with V
a Wake-Up condition
Clock input for the Serial Peripheral
Interface (SPI) of the device
SPI data received by the device
SPI data sent to the MCU. When the CS
is high, MISO is high-impedance
5.0 or 3.3 V output pin of the main
regulator for the Microcontroller supply.
pull-up to VDD
CAN bus receive data output
Connection to the external PNP path
transistor. This is an intermediate current
supply source for the V
Base output pin for connection to the
external PNP pass transistor
Ground
Freescale Semiconductor
DD
Definition
ON, a transition on CS is
page
DD
34.
regulator
.
The