STM8L101F2P6TR STMicroelectronics, STM8L101F2P6TR Datasheet - Page 62

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STM8L101F2P6TR

Manufacturer Part Number
STM8L101F2P6TR
Description
IC MCU 8BIT 4KB FLASH 20TSSOP
Manufacturer
STMicroelectronics
Series
STM8L EnergyLiter
Datasheet

Specifications of STM8L101F2P6TR

Featured Product
STM32 Cortex-M3 Companion Products
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Infrared, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP (0.173", 4.40mm Width)
Core
STM8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
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Electrical parameters
9.3.9
62/81
EMC characteristics
Susceptibility tests are performed on a sample basis during product characterization.
Functional EMS (electromagnetic susceptibility)
Based on a simple running application on the product (toggling 2 LEDs through I/O ports),
the product is stressed by two electromagnetic events until a failure occurs (indicated by the
LEDs).
A device reset allows normal operations to be resumed. The test results are given in the
table below based on the EMS levels and classes defined in application note AN1709.
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and
prequalification tests in relation with the EMC level requested for his application.
Prequalification trials:
Most of the common failures (unexpected reset and program counter corruption) can be
reproduced by manually forcing a low state on the NRST pin or the oscillator pins for 1
second.
To complete these trials, ESD stress can be applied directly on the device, over the range of
specification values. When unexpected behavior is detected, the software can be hardened
to prevent unrecoverable errors occurring (see application note AN1015).
Table 34.
Symbol
V
V
FESD
EFTB
ESD: Electrostatic discharge (positive and negative) is applied on all pins of the device
until a functional disturbance occurs. This test conforms with the IEC 61000-4-2
standard.
FTB: A burst of fast transient voltage (positive and negative) is applied to V
through a 100 pF capacitor, until a functional disturbance occurs. This test conforms
with the IEC 61000-4-4 standard.
Voltage limits to be applied on any I/O pin to
induce a functional disturbance
Fast transient voltage burst limits to be
applied through 100 pF on V
pins to induce a functional disturbance
EMS data
Parameter
Doc ID 15275 Rev 11
DD
and V
SS
LQFP32, V
LQFP32, V
LQFP32, V
DD
DD
DD
Conditions
3.3 V
3.3 V, f
3.3 V, f
HSI
HSI
/2
STM8L101xx
DD
and V
Level/
Class
3B
3B
4A
SS

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