ML610Q412P-NNNTB03A7 Rohm Semiconductor, ML610Q412P-NNNTB03A7 Datasheet - Page 95

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ML610Q412P-NNNTB03A7

Manufacturer Part Number
ML610Q412P-NNNTB03A7
Description
MCU 8BIT 16K FLASH 120-TQFP
Manufacturer
Rohm Semiconductor

Specifications of ML610Q412P-NNNTB03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
625kHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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6.3.2.2
In external clock input mode, external clock is input from the P10/OSC0 pin.
Figure 6-5 shows the circuit configuration in external clock input mode.
Notes:
− The external clock input mode is not available on ML610Q415.
− The external clock input mode can be used within a V
− Since the diodes are included between the P10/OSC0 pin and V
− If the P10/OSC0 pin is left open in external clock input mode, excessive current can flow. Therefore, make sure that
− The maximum operating frequency guaranteed for the system clock (SYSCLK) of this LSI is 500kHz. The external
the operation voltage range by using the power supply voltage detection circuit (BLD).
apply voltages higher than V
the “H” level (V
clock that is connected to the P10/OSC0 pins must not exceed 500kHz. For more detail about the specification, see
Appendix C, “Electrical Characteristics”
External clock input
External Clock Input Mode
DD
) or the “L” level (V
Figure 6-5 Circuit Configuration in External Clock Input Mode
DD
and lower than V
P10/OSC0
SS
) is input.
V
SS
DD
to the P10/OSC0 pin.
6 – 10
DD
ML610Q411/ML610Q412/ML610Q415 User’s Manual
range of 1.8 V to 3.6 V. Select a frequency according to
DD
and between the P10/OSC0 pin and V
Chapter 6 Clock Generation Circuit
STOP mode
ENOSC (Enables oscillation)
High-speed oscillation clock
(OSCLK)
SS
, do not

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