PCF8564ACX9/B/1,02 NXP Semiconductors, PCF8564ACX9/B/1,02 Datasheet - Page 20

• Manufacturer Part Number: PCF8564ACX9/B/1,02
• Description: IC RTC/CALENDAR
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCF8564ACX9/B/1,02

• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: Die
• Function: Serial Clock, Alarm, Calendar, Timer, Timer Interrupt
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1 V
• Mounting Style: SMD/SMT
• Rtc Bus Interface: I2C
• Supply Current: 1700 nA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed
• Other names: 568-6424-2; PCF8564ACX9/B/1,02

NXP Semiconductors
PCF8564A
Product data sheet
Fig 11. POR override sequence
Allow 500 ns between the edges of either signal.
SDA
SCL
8.11.1 Power-On Reset (POR) override
power-on
8 ms
Table 27.
[1]
The POR duration is directly related to the crystal oscillator start-up time. Due to the long
start-up times experienced by these types of circuits, a circuit has been implemented to
disable the POR and speed up functional test of the module. The setting of this mode
requires that the I
Figure
Once the override mode has been entered, the chip immediately stops, being reset, and
normal operation may begin, i.e., entry into the EXT_CLK test mode via I
override mode may be cleared by writing logic 0 to TESTC. TESTC must be set to logic 1
before re-entry into the override mode is possible. Setting TESTC to logic 0 during normal
operation has no effect, except to prevent entry into the POR override mode.
Address Register name
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
Registers marked ‘x’ are undefined at power-on and unchanged by subsequent resets.
11. All timings shown are required minimums.
Control_1
Control_2
Seconds
Minutes
Hours
Days
Weekdays
Months
Years
Minute_alarm
Hour_alarm
Day_alarm
Weekday_alarm
CLKOUT_ctrl
Timer_ctrl
Timer
Register reset values
500 ns
All information provided in this document is subject to legal disclaimers.
2
C signals on the pins SDA and SCL are toggled as illustrated in
Rev. 02 — 30 September 2010
2000 ns
Bit
7
0
0
1
x
x
x
x
x
x
1
1
1
1
1
0
x
[1]
6
0
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
5
0
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
4
0
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Real time clock and calendar
override active
3
1
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
PCF8564A
2
0
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
© NXP B.V. 2010. All rights reserved.
2
mgm664
C access. The
1
0
0
x
x
x
x
x
x
x
x
x
x
x
0
1
x
0
0
0
x
x
x
x
x
x
x
x
x
x
x
0
1
x
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