A54SX32A-PQ208 Actel, A54SX32A-PQ208 Datasheet - Page 5

• Manufacturer Part Number: A54SX32A-PQ208
• Description: FPGA - Field Programmable Gate Array 32K System Gates
• Manufacturer: Actel

Specifications of A54SX32A-PQ208

• Processor Series: A54SX32
• Core: IP Core
• Number Of Macrocells: 1800
• Maximum Operating Frequency: 238 MHz
• Number Of Programmable I/os: 174
• Delay Time: 1.2 ns
• Supply Voltage (max): 5.25 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 2.25 V
• Number Of Gates: 48 K
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

General Description
The HiRel versions of Actel SX-A family FPGAs offer
advantages for commercial applications and all types of
military and high reliability equipment.
The HiRel versions are fully pin compatible, allowing
designs to migrate across different applications that do
not have radiation requirements. Additionally, the HiRel
devices can be used as a lower cost prototyping tool for
RadTolerant (RT) designs. This datasheet discusses HiRel
SX-A products. Refer to the
information concerning RadTolerant products.
The programmable architecture of these devices offers
high performance, design flexibility, and fast and
inexpensive prototyping, all without the expense of test
vectors, NRE charges, long lead times, and schedule and
cost penalties for design modifications that are often
required by ASIC devices.
QML Certification
Actel has achieved full QML certification, demonstrating
that quality management, procedures, processes, and
controls are in place and comply with MIL-PRF-38535, the
performance specification used by the Department of
Defense for monolithic integrated circuits. QML certification
is an example of the Actel commitment to supplying the
highest quality products for all types of high reliability,
military, and space applications.
Note: HiRel A54SX72A has four layers of metal with the antifuse between Metal 3 and Metal 4. HiRel A54SX32A has three layers of metal
Figure 1-1 •
with antifuse between Metal 2 and Metal 3.
HiRel SX-A Family Interconnect Elements
Tungsten Plug Contact
Routing Tracks
Actel website
Metal 3
Metal 4
Metal 1
Metal 2
for more
Silicon Substrate
v2.0
Many suppliers of microelectronics components have
implemented QML as their primary worldwide business
system. Appropriate use of this system not only helps in
the implementation of advanced technologies, but also
allows for quality, reliable, and cost-effective logistics
support throughout the life cycles of QML products.
HiRel SX-A Family Architecture
The HiRel SX-A family architecture was designed to
satisfy next-generation performance and integration
requirements for production volume designs in a broad
range of applications.
Programmable Interconnect Element
The HiRel SX-A family incorporates either three (in HiRel
A54SX32A) or four (in HiRel A54SX72A) layers of metal
interconnect and provides efficient use of silicon by
locating the routing interconnect resources between the
top two metal layers
eliminates the channels of routing and interconnect
resources between logic modules (as implemented on
SRAM FPGAs and previous generations of antifuse
FPGAs) and enables the entire floor of the device to be
spanned with an uninterrupted grid of logic modules.
Amorphous Silicon/
Dielectric Antifuse
Tungsten Plug Via
Tungsten Plug Via
(Figure
HiRel SX-A Family FPGAs
1-1). This completely
1-1