A54SX32A-PQ208 Actel, A54SX32A-PQ208 Datasheet - Page 47

• Manufacturer Part Number: A54SX32A-PQ208
• Description: FPGA - Field Programmable Gate Array 32K System Gates
• Manufacturer: Actel

Specifications of A54SX32A-PQ208

• Processor Series: A54SX32
• Core: IP Core
• Number Of Macrocells: 1800
• Maximum Operating Frequency: 238 MHz
• Number Of Programmable I/os: 174
• Delay Time: 1.2 ns
• Supply Voltage (max): 5.25 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 2.25 V
• Number Of Gates: 48 K
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Datasheet Information
List of Changes
The following table lists critical changes that were made in the current version of the document.
Previous version
Advanced v1.2
(December 2002)
Advanced v1.1
Preliminary v1.0
Changes in current version—v2.0
The 84-pin CQFP package information was added to the datasheet.
The Product Plan table was deleted because all of the devices are production devices.
Table 1-6 • Absolute Maximum Ratings1
information. In addition, two notes were added to the table.
Notes 1 and 2 were added to
The
The
All of the Timing Characteristic tables were updated because to include the fully characterized
data.
Table 1-8 • 3.3 V LVTTL and 5 V TTL Electrical Specifications
Table 1-12 • DC Specifications, 3.3 V PCI Operation
The
Figure 1-1 • HiRel SX-A Family Interconnect Elements
The
The
Table 1-2 • I/O Features
The
Table 1-3 • I/O Characteristics for All I/O Configurations
Table 1-4 • Power-Up Time at which I/Os Become Active
The
The
Figure 1-10 • Probe Setup
Table 1-6 • Absolute Maximum Ratings1
Table 1-7 • Recommended Operating Conditions
Table 1-9 • Maximum Source and Sink Currents for All I/O Standards
Figure 1-15 • HiRel SX-A Timing Model
The
"HiRel SX-A Timing Model"
"Hardwired Clock"
"Ordering Information" section
"Clock Resources" section
"I/O Modules" section
"Hot-Swapping" section
"Power Requirements" section
"Design Considerations" section
"Pin Description" section
and
was updated.
was updated.
was updated.
"Routed Clock"
was updated.
Table 1-8 • 3.3 V LVTTL and 5 V TTL Electrical
was updated.
was updated.
was updated.
was updated.
was updated.
was updated.
was updated.
was updated.
v2.0
was updated to include V
equations were updated.
was updated.
was updated.
was updated.
is new.
is new.
was updated.
is new.
CCA
Specifications.
AC supply voltage
HiRel SX-A Family FPGAs
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