APA150-TQG100 Actel, APA150-TQG100 Datasheet - Page 91

FPGA - Field Programmable Gate Array 150K System Gates

APA150-TQG100

Manufacturer Part Number
APA150-TQG100
Description
FPGA - Field Programmable Gate Array 150K System Gates
Manufacturer
Actel
Datasheet

Specifications of APA150-TQG100

Processor Series
APA150
Core
IP Core
Maximum Operating Frequency
150 MHz
Number Of Programmable I/os
242
Data Ram Size
36864
Supply Voltage (max)
2.7 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
APA-Eval-Kit, APA-Eval-BRD1, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
2.3 V
Number Of Gates
150 K
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
APA150-TQG100
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
APA150-TQG100
Manufacturer:
ACTEL
Quantity:
1 000
Part Number:
APA150-TQG100A
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
APA150-TQG100I
Manufacturer:
LT
Quantity:
1 400
Part Number:
APA150-TQG100I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Number
Pin
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
Function
APA075
V
V
GND
GND
GND
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
Function
APA150
V
GND
GND
V
GND
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
Function
APA300
V
V
GND
GND
GND
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
208-Pin PQFP
v5.9
Function
APA450
V
GND
GND
V
GND
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
Function
APA600
V
V
GND
GND
GND
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
ProASIC
Function
APA750
V
GND
GND
V
GND
V
PLUS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
Flash Family FPGAs
APA1000
Function
V
GND
GND
V
GND
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DDP
DDP
DD
3-7

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