APA150-TQG100 Actel, APA150-TQG100 Datasheet - Page 37

• Manufacturer Part Number: APA150-TQG100
• Description: FPGA - Field Programmable Gate Array 150K System Gates
• Manufacturer: Actel

Specifications of APA150-TQG100

• Processor Series: APA150
• Core: IP Core
• Maximum Operating Frequency: 150 MHz
• Number Of Programmable I/os: 242
• Data Ram Size: 36864
• Supply Voltage (max): 2.7 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: APA-Eval-Kit, APA-Eval-BRD1, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 2.3 V
• Number Of Gates: 150 K
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Package Thermal Characteristics
The ProASIC
types with a range of pin counts. Actel has selected
packages based on high pin count, reliability factors, and
superior thermal characteristics.
Thermal resistance defines the ability of a package to
conduct heat away from the silicon, through the
package to the surrounding air. Junction-to-ambient
thermal resistance is measured in degrees Celsius/Watt
and is represented as Theta ja
thermal resistance, the more efficiently a package will
dissipate heat.
A package’s maximum allowed power (P) is a function of
maximum junction temperature (T
operating temperature (T
thermal resistance
the maximum allowable temperature on the active
Table 2-16 • Package Thermal Characteristics
Plastic Packages
Thin Quad Flat Pack (TQFP)
Thin Quad Flat Pack (TQFP)
Plastic Quad Flat Pack (PQFP)
PQFP with heat spreader
Plastic Ball Grid Array (PBGA)
Fine Pitch Ball Grid Array (FBGA)
Fine Pitch Ball Grid Array (FBGA)
Fine Pitch Ball Grid Array (FBGA)
Fine Pitch Ball Grid Array (FBGA)
Fine Pitch Ball Grid Array (FBGA)
Fine Pitch Ball Grid Array (FBGA)
Fine Pitch Ball Grid Array (FBGA)
Ceramic Quad Flat Pack (CQFP)
Ceramic Quad Flat Pack (CQFP)
Ceramic Column Grid Array (CCGA/LGA)
Notes:
1. Valid for the following devices irrespective of temperature grade: APA075, APA150, and APA300
2. Valid for the following devices irrespective of temperature grade: APA450, APA600, APA750, and APA1000
3. Depopulated array
4. Full array
Maximum Power Allowed
PLUS
family is available in several package
Θ
ja
. Maximum junction temperature is
2
1
A
3
4
), and junction-to-ambient
=
( Θ
J
Max. junction temp. (°C) Max. case temp. (°C)
---------------------------------------------------------------------------------------------------------------------------- -
), maximum ambient
ja
). The lower the
Pin Count
1152
100
144
208
208
456
144
256
484
484
676
896
208
352
624
θ
jc
14.0
11.0
8.0
3.8
3.0
3.8
3.8
3.2
3.2
3.2
2.4
1.8
2.0
2.0
6.5
θ
(°C/W)
jc
v5.9
–
surface of the integrated circuit (IC) and is 110°C. P is
defined as shown in
Θ
(lfpm)) of airflow in contact with the package. When the
estimated power consumption exceeds the maximum
allowed power, other means of cooling, such as
increasing the airflow rate, must be used. The maximum
power dissipation allowed for a Military temperature
device is specified as a function of
maximum junction temperature is 150°C.
The calculation of the absolute maximum power
dissipation
application is illustrated in the following example for a
456-pin PBGA package:
ja
Still Air
is a function of the rate (in linear feet per minute
33.5
33.5
26.1
16.2
15.6
26.6
18.0
20.5
16.4
13.6
12.0
22.0
17.9
26.9
8.9
allowed
200 ft./min.
1.0 m/s
=
27.4
28.0
22.5
13.3
12.5
22.9
22.8
14.7
17.0
13.0
10.4
19.8
16.1
8.9
8.5
150°C 125°C
--------------------------------------- -
EQ
θ
ja
3.0°C/W
P
2-4:
for
=
ProASIC
–
T
---------------- -
J
Θ
–
a
500 ft./min.
ja
T
A
2.5 m/s
PLUS
Military
25.0
25.7
20.8
11.6
21.5
21.5
15.9
12.0
18.0
14.7
=
11.9
13.6
9.4
7.9
8.0
8.333W
Flash Family FPGAs
Θ
jc
. The absolute
temperature
Units
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
EQ 2-4
EQ 2-5
2-27