A2F500M3G-FGG256 Actel, A2F500M3G-FGG256 Datasheet - Page 111

• Manufacturer Part Number: A2F500M3G-FGG256
• Description: FPGA - Field Programmable Gate Array 500K System Gates
• Manufacturer: Actel

Specifications of A2F500M3G-FGG256

• Processor Series: A2F500
• Core: ARM Cortex M3
• Number Of Logic Blocks: 24
• Maximum Operating Frequency: 100 MHz
• Number Of Programmable I/os: 117
• Data Ram Size: 64 KB
• Delay Time: 50 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.5 V
• Number Of Gates: 500000
• Package / Case: FPBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5 – Pin Descriptions
Supply Pins
Name
GND
GND15ADC0
GND15ADC1
GND15ADC2
GND33ADC0
GND33ADC1
GND33ADC2
GNDA
GNDAQ
GNDENVM
GNDLPXTAL
GNDMAINXTAL
GNDQ
GNDRCOSC
GNDSDD0
GNDSDD1
GNDTM0
GNDTM1
GNDTM2
GNDVAREF
VCC
Notes:
1. The following 3.3 V supplies should be connected together while following proper noise filtering practices: VCC33A,
2. The following 1.5 V supplies should be connected together while following proper noise filtering practices: VCC,
VCC33ADCx, VCC33AP, VCC33SDDx, VCCMAINXTAL, and VCCLPXTAL.
VCC15A, and VCC15ADCx.
Ground Digital ground to the FPGA fabric, microcontroller subsystem and GPIOs
Ground Quiet analog ground to the 1.5 V circuitry of the first analog-to-digital converter (ADC)
Ground Quiet analog ground to the 1.5 V circuitry of the second ADC
Ground Quite analog ground to the 1.5 V circuitry of the third ADC
Ground Quiet analog ground to the 3.3 V circuitry of the first ADC
Ground Quiet analog ground to the 3.3 V circuitry of the second ADC
Ground Quiet analog ground to the 3.3 V circuitry of the third ADC
Ground Quiet analog ground to the analog front-end
Ground Quiet analog ground to the analog I/O of SmartFusion devices
Ground Digital ground to the embedded nonvolatile memory (eNVM)
Ground Analog ground to the low power 32 KHz crystal oscillator circuitry
Ground Analog ground to the main crystal oscillator circuitry
Ground Quiet digital ground supply voltage to input buffers of I/O banks. Within the package, the
Ground Analog ground to the integrated RC oscillator circuit
Ground Analog ground to the first sigma-delta DAC
Ground Common analog ground to the second and third sigma-delta DACs
Ground Analog temperature monitor common ground for signal conditioning blocks SCB 0 and
Ground Analog temperature monitor common ground for signal conditioning block SCB 2 and
Ground Analog temperature monitor common ground for signal conditioning block SCB4
Ground Analog ground reference used by the ADC. This pad should be connected to a quiet
Supply
Type
GNDQ plane is decoupled from the simultaneous switching noise originated from the
output buffer ground domain. This minimizes the noise transfer within the package and
improves input signal integrity. GNDQ needs to always be connected on the board to
GND.
SCB 1 (see information for pins
section on page
SBCB 3 (see information for pins
section on page
analog ground.
Digital supply to the FPGA fabric and MSS, nominally 1.5 V. VCC is also required for
powering the JTAG state machine, in addition to V
device is in bypass mode in a JTAG chain of interconnected devices, both VCC and
V
device.
JTAG
must remain powered to allow JTAG signals to pass through the SmartFusion
5-12).
5-12).
R e v i s i o n 6
"TM0"
"TM2"
Description
and
and
SmartFusion Intelligent Mixed Signal FPGAs
"TM1"
"TM3"
in the
JTAG
in the
. Even when a SmartFusion
"Analog Front-End (AFE)"
"Analog Front-End (AFE)"
5 -1