MAX5978ETJ+ Maxim Integrated Products, MAX5978ETJ+ Datasheet - Page 21

• Manufacturer Part Number: MAX5978ETJ+
• Description: Hot Swap & Power Distribution 0-16V HOTSWAP CONTLR W/10BIT CUR VOLT MON
• Manufacturer: Maxim Integrated Products

Specifications of MAX5978ETJ+

• Product: Controllers & Switches
• Supply Voltage (max): 16 V
• Supply Voltage (min): 0 V
• Power Dissipation: 2759 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Supply Current: 2.5 mA
• Package / Case: TQFN-32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Current-sense measurement values from the ADC are
continuously compared with the contents of minimum-
and maximum-value registers, and if the most recent
measurement exceeds the stored maximum, or is less
than the stored minimum, the corresponding register
Table 12. ADC Minimum Current-Conversion Register Format (High-Order Bits)
Table 13. ADC Minimum Current-Conversion Register Format (Low-Order Bits)
Table 14. ADC Maximum Current-Conversion Register Format (High-Order Bits)
Table 15. ADC Maximum Current-Conversion Register Format (Low-Order Bits)
Description:
Register Title:
Register Addresses:
Description:
Register Title:
Register Addresses:
Description:
Register Title:
Register Addresses:
Description:
Register Title:
Register Addresses:
imax_9
imin_9
Minimum and Maximum Value Detection
Bit 7
Bit 7
Bit 7
Bit 7
—
—
R
R
R
R
Current, Voltage Monitor, and 4 LED Drivers
for Current-Measurement Values
0 to 16V, Hot-Swap Controller with 10-Bit
imax_8
imin_8
Bit 6
Bit 6
Bit 6
Bit 6
—
—
R
R
R
R
Minimum current-conversion result high-order bits [9:2]
min_cs_msb
0x08
Minimum current-conversion result low-order bits [1:0]
min_cs_ lsb
0x09
Maximum current-conversion result high-order bits [9:2]
max_cs_msb
0x0A
Maximum current-conversion result low-order bits [1:0]
max_cs_lsb
0x0B
imax_7
imin_7
Bit 5
Bit 5
Bit 5
Bit 5
—
—
R
R
R
R
imax_6
imin_6
Bit 4
Bit 4
Bit 4
Bit 4
—
—
R
R
R
R
imax_5
imin_5
Bit 3
Bit 3
Bit 3
Bit 3
—
—
R
R
R
R
is updated with the new value. These “peak-detection”
registers are read/write accessible through the I
face (Tables 12–15). The minimum-value registers are
reset to 0xFF and the maximum-value registers are reset
to 0x00. These reset values are loaded upon startup of
the channel or at any time as commanded by register
peak_log_rst (Table 35).
imax_4
imin_4
Bit 2
Bit 2
Bit 2
Bit 2
—
—
R
R
R
R
imax_3
imax_1
imin_3
imin_1
Bit 1
Bit 1
Bit 1
Bit 1
R
R
R
R
imax_2
imax_0
imin_2
imin_0
Bit 0
Bit 0
Bit 0
Bit 0
R
R
R
R
VALUE
VALUE
VALUE
VALUE
RESET
RESET
RESET
RESET
0xFF
0x03
0x00
0x00
2
—
—
—
—
C inter-
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