MAX5978ETJ+ Maxim Integrated Products, MAX5978ETJ+ Datasheet - Page 16

Hot Swap & Power Distribution 0-16V HOTSWAP CONTLR W/10BIT CUR VOLT MON

MAX5978ETJ+

Manufacturer Part Number
MAX5978ETJ+
Description
Hot Swap & Power Distribution 0-16V HOTSWAP CONTLR W/10BIT CUR VOLT MON
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5978ETJ+

Product
Controllers & Switches
Supply Voltage (max)
16 V
Supply Voltage (min)
0 V
Power Dissipation
2759 mW
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Supply Current
2.5 mA
Package / Case
TQFN-32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
0 to 16V, Hot-Swap Controller with 10-Bit
Current, Voltage Monitor, and 4 LED Drivers
Figure 1. Channel On-Off Control Logic Functional Schematic
duration t
the MOSFET data sheet to determine the junction tem-
perature rise during startup, and ensure that this does
not exceed the maximum junction temperature for worst-
case ambient conditions.
As the channel is turned on and during normal operation,
two analog comparators are used to detect an overcur-
rent condition by sensing the voltage across an external
resistor connected between SENSE and MON. If the volt-
age across the sense resistor is less than the slow-trip
and fast-trip circuit-breaker thresholds, the GATE output
remains high. If either of the thresholds is exceeded due
to an overcurrent condition, the gate of the MOSFET
is pulled down to MON by an internal 500mA current
source.
The higher of the two comparator thresholds, the fast
trip, is set by an internal 8-bit DAC (see Table 7),
within one of three configurable full-scale current-sense
16
SU
. Refer to the thermal resistance charts in
ANALOG SLOW TRIP
ANALOG FAST TRIP
Circuit-Breaker Protection
UV/OV CRITICAL
EN1 BIT
EN2 BIT
PROT
ON
S
S
R
R
ranges: 25mV, 50mV, or 100mV (see Tables 6a and 6b).
The 8-bit fast-trip threshold DAC can be programmed
from 40% to 100% of the selected full-scale current-
sense range. The slow-trip threshold follows the fast-trip
threshold as one of four programmable ratios, set by the
ifast2slow register (see Tables 4a and 4b).
The fast-trip threshold is always higher than the slow-trip
threshold, and the fast-trip comparator responds very
quickly to protect the system against sudden, severe
overcurrent events. The slower response of the slow-
trip comparator varies depending upon the amount of
overdrive beyond the slow-trip threshold. If the overdrive
is small and short lived, the comparator will not shut
down the affected channel. As the overcurrent event
increases in magnitude, the response time of the slow-
trip comparator decreases. This scheme provides good
noise rejection and spurious overcurrent transients near
the slow-trip threshold, while aggressively protecting the
system against larger overcurrent events that occur as a
result of a load fault.
Q
Q
Q
Q
FORCE-ON
BIT
200ms DELAY,
THEN PULSE
CHANNEL
ENABLED

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