PIC18F6585-I/L Microchip Technology, PIC18F6585-I/L Datasheet - Page 478

Microcontrollers (MCU) 48KB 3328 RAM 52 I/O

PIC18F6585-I/L

Manufacturer Part Number
PIC18F6585-I/L
Description
Microcontrollers (MCU) 48KB 3328 RAM 52 I/O
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC18F6585-I/L

Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C/SPI/AUSART/CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Program Memory Type
Flash
Program Memory Size
48 KB
Package / Case
PLCC-68
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F6585/8585/6680/8680
E
ECAN Module ................................................................... 275
DS30491C-page 476
Baud Rate Setting..................................................... 337
Bit Time Partitioning .................................................. 337
Bit Timing Configuration
Calculating T
CAN Baud Rate Registers ........................................ 315
CAN Control and Status
CAN Controller Register Map ................................... 323
CAN I/O Control Register.......................................... 318
CAN Interrupt Registers ............................................ 319
CAN Interrupts .......................................................... 342
CAN Message Buffers .............................................. 331
CAN Message Transmission .................................... 332
CAN Modes of Operation .......................................... 328
CAN Registers .......................................................... 277
Configuration Mode................................................... 328
Dedicated CAN Receive
Dedicated CAN Transmit
Disable Mode ............................................................ 328
Error Detection .......................................................... 341
Error Modes State (diagram) .................................... 342
Error Recognition Mode ............................................ 330
Filter-Mask Truth (table)............................................ 335
Functional Modes...................................................... 330
Registers........................................................... 340
Nominal Bit Time............................................... 338
Registers........................................................... 277
Acknowledge..................................................... 343
Bus Activity Wake-up ........................................ 343
Bus-Off.............................................................. 343
Code Bits .......................................................... 342
Error .................................................................. 343
Message Error .................................................. 343
Receive ............................................................. 343
Receiver Bus Passive ....................................... 343
Receiver Overflow............................................. 343
Receiver Warning ............................................. 343
Transmit ............................................................ 342
Transmitter Bus Passive ................................... 343
Transmitter Warning ......................................... 343
Dedicated Receive............................................ 331
Dedicated Transmit........................................... 331
Programmable Auto-RTR ................................. 332
Programmable
Aborting............................................................. 332
Initiating............................................................. 332
Priority............................................................... 333
Buffer Registers ................................................ 291
Buffer Registers ................................................ 285
Acknowledge..................................................... 341
Bit...................................................................... 341
CRC .................................................................. 341
Error Modes and Counters................................ 341
Error States....................................................... 341
Form.................................................................. 341
Stuff Bit ............................................................. 341
Mode 0 - Legacy Mode ..................................... 330
Mode 1 - Enhanced
Mode 2 - Enhanced
Transmit/Receive ...................................... 331
Legacy Mode ............................................ 330
FIFO Mode................................................ 331
Q
, Nominal Bit Rate and
Electrical Characteristics .................................................. 413
Enhanced Capture/Compare/PWM
Enhanced PWM Mode.
Enhanced Universal Synchronous
Errata .................................................................................... 7
Error Recognition Mode.................................................... 328
Evaluation and Programming Tools.................................. 411
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Mode Requirements
Example SPI Slave Mode Requirements
External Clock Timing
External Memory Interface.................................................. 93
Information Processing Time
Lengthening a Bit Period .......................................... 339
Listen Only Mode...................................................... 330
Loopback Mode ........................................................ 330
Message Acceptance Filters
Message Acceptance Mask and
Message Reception .................................................. 334
Normal Mode ............................................................ 328
Oscillator Tolerance.................................................. 340
Overview................................................................... 275
Phase Buffer Segments............................................ 338
Programmable TX/RX and
Programming Time Segments .................................. 340
Propagation Segment ............................................... 338
Sample Point ............................................................ 338
Shortening a Bit Period............................................. 340
Synchronization ........................................................ 339
Synchronization Segment......................................... 338
Time Quanta ............................................................. 338
(ECCP) ..................................................................... 175
Outputs ..................................................................... 176
See PWM (ECCP Module).
Asynchronous Receiver
Transmitter (USART) ................................................ 229
(Master Mode, CKE = 0)........................................... 437
(Master Mode, CKE = 1)........................................... 438
(Slave Mode, CKE = 0)............................................. 439
(CKE = 1).................................................................. 440
Requirements ........................................................... 428
16-bit Byte Select Mode.............................................. 98
16-bit Byte Write Mode ............................................... 96
16-bit Mode................................................................. 96
16-bit Mode Timing ..................................................... 99
16-bit Word Write Mode.............................................. 97
PIC18F8X8X External Bus -
Program Memory Modes ............................................ 93
(IPT).................................................................. 338
and Masks ................................................ 306, 335
Filter Operation................................................. 336
Enhanced FIFO Mode ...................................... 335
Priority .............................................................. 334
Time-Stamping ................................................. 335
Auto-RTR Buffers ............................................. 297
Hard.................................................................. 339
Resynchronization ............................................ 339
Rules ................................................................ 339
I/O Port Functions............................................... 95
 2004 Microchip Technology Inc.

Related parts for PIC18F6585-I/L