PIC18F6585-I/L Microchip Technology, PIC18F6585-I/L Datasheet - Page 392
PIC18F6585-I/L
Manufacturer Part Number
PIC18F6585-I/L
Description
Microcontrollers (MCU) 48KB 3328 RAM 52 I/O
Manufacturer
Microchip Technology
Datasheet
1.PCM18XK1.pdf
(496 pages)
Specifications of PIC18F6585-I/L
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C/SPI/AUSART/CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Program Memory Type
Flash
Program Memory Size
48 KB
Package / Case
PLCC-68
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F6585/8585/6680/8680
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS30491C-page 390
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
=
=
=
=
register ‘f’
operation
Move f to f
[ label ]
0
0
(f
None
The contents of source register ‘f
are moved to destination register
‘f
anywhere in the 4096-byte data
space (000h to FFFh) and location
of destination ‘f
anywhere from 000h to FFFh.
Either source or destination can be
W (a useful special situation).
MOVFF is particularly useful for
transferring a data memory location
to a peripheral register (such as the
transmit buffer or an I/O port).
The MOVFF instruction cannot use
the PCL, TOSU, TOSH or TOSL as
the destination register
2
2 (3)
MOVFF
d
Read
s
(src)
read
’. Location of source ‘f
)
1100
1111
No
Q2
0x33
0x11
0x33,
0x33
f
f
s
d
f
d
4095
4095
REG1, REG2
MOVFF f
ffff
ffff
operation
Process
Data
No
Q3
d
’ can also be
ffff
ffff
s
,f
d
register ‘f’
operation
s
’ can be
(dest)
Write
No
Q4
fff
fff
f
f
s
s
d
’
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
Read literal
Move literal to low nibble in BSR
[ label ]
0
k
None
The 8-bit literal ‘k’ is loaded into
the Bank Select Register (BSR).
1
1
MOVLB
0000
Q2
‘k’
=
=
k
2004 Microchip Technology Inc.
BSR
255
0x02
0x05
5
MOVLB k
0001
Process
Data
Q3
kkkk
literal ‘k’ to
Write
BSR
Q4
kkkk
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