ATMEGA128A-ANR Atmel, ATMEGA128A-ANR Datasheet - Page 327
ATMEGA128A-ANR
Manufacturer Part Number
ATMEGA128A-ANR
Description
IC MCU AVR 128K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128A-ANR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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27.8
8151H–AVR–02/11
SPI Timing Characteristics
Table 27-5.
Notes:
See
Table 27-6.
Note:
Symbol
t
t
t
BVDV
OLDV
OHDZ
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Figure 27-7
1. t
2. t
1. In SPI Programming mode the minimum SCK high/low period is:
commands.
- 2 t
- 3 t
SS high to tri-state
WLRH
WLRH_CE
SCK to out high
SCK to SS high
SCK high/low
SS low to SCK
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
Parameter
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
Parallel Programming Characteristics, V
SPI Timing Parameters
Description
CLCL
CLCL
SCK period
Out to SCK
SCK period
SCK to out
SCK to out
and
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits
Setup
Setup
Hold
Hold
for f
for f
is valid for the Chip Erase command.
Figure 27-8
CK
CK
< 12MHz
>12MHz
(1)
for details.
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
4 • t
2 • t
2 • t
Min
10
10
20
ck
ck
ck
CC
= 5V ±10% (Continued)
See
50% duty cycle
0.5 • t
Min
Table 19-4
Typ
0
3.6
10
10
10
10
15
15
10
sck
ATmega128A
Typ
Max
250
250
250
Max
1.6
Units
ns
ns
ns
ns
µs
ns
327
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