ATMEGA64A-MN Atmel, ATMEGA64A-MN Datasheet - Page 218
ATMEGA64A-MN
Manufacturer Part Number
ATMEGA64A-MN
Description
IC MCU AVR 64K FLASH 8QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA64A-AU.pdf
(392 pages)
Specifications of ATMEGA64A-MN
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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21.7.3
8160C–AVR–07/09
Slave Receiver Mode
Figure 21-14. Formats and States in the Master Receiver Mode
In the Slave Receiver mode, a number of data bytes are received from a master transmitter (see
Figure
zero or are masked to zero.
Figure 21-15. Data Transfer in Slave Receiver Mode
SDA
SCL
Successfull
reception
from a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
21-15). All the status codes mentioned in this section assume that the prescaler bits are
Device 1
RECEIVER
From master to slave
From slave to master
$08
SLAVE
S
SLA
TRANSMITTER
Device 2
MASTER
R
MR
A or A
DATA
$40
$48
$38
$68
A
A
A
$78
Device 3
Other master
Other master
n
continues
continues
P
$B0
DATA
A
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-wire Serial Bus. The
prescaler bits are zero or masked to zero
........
$50
$38
To corresponding
states in slave mode
A
A
Device n
Other master
DATA
continues
V
CC
$58
A
$10
ATmega64A
R1
P
R
S
SLA
R2
W
R
MT
218
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