ATTINY5-MAH Atmel, ATTINY5-MAH Datasheet - Page 13

• Manufacturer Part Number: ATTINY5-MAH
• Description: IC MCU AVR 512B FLASH 8UDFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY5-MAH

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Peripherals: POR, PWM, WDT
• Number Of I /o: 4
• Program Memory Size: 512B (256 x 16)
• Program Memory Type: FLASH
• Ram Size: 32 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-UFDFN Exposed Pad
• Core: AVR8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

8127D–AVR–02/10
• Bit 6 – T: Bit Copy Storage
The Bit Copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit as source or desti-
nation for the operated bit. A bit from a register in the Register File can be copied into T by the
BST instruction, and a bit in T can be copied into a bit in a register in the Register File by the
BLD instruction.
• Bit 5 – H: Half Carry Flag
The Half Carry Flag H indicates a Half Carry in some arithmetic operations. Half Carry is useful
in BCD arithmetic. See document “AVR Instruction Set” and section
on page 152
• Bit 4 – S: Sign Bit, S = N
The S-bit is always an exclusive or between the Negative Flag N and the Two’s Complement
Overflow Flag V. See document “AVR Instruction Set” and section
page 152
• Bit 3 – V: Two’s Complement Overflow Flag
The Two’s Complement Overflow Flag V supports two’s complement arithmetics. See document
“AVR Instruction Set” and section
information.
• Bit 2 – N: Negative Flag
The Negative Flag N indicates a negative result in an arithmetic or logic operation. See docu-
ment “AVR Instruction Set” and section
information.
• Bit 1 – Z: Zero Flag
The Zero Flag Z indicates a zero result in an arithmetic or logic operation. See document “AVR
Instruction Set” and section
• Bit 0 – C: Carry Flag
The Carry Flag C indicates a carry in an arithmetic or logic operation. See document “AVR
Instruction Set” and section
for detailed information.
for detailed information.
“Instruction Set Summary” on page 152
“Instruction Set Summary” on page 152
⊕
V
“Instruction Set Summary” on page 152
“Instruction Set Summary” on page 152
“Instruction Set Summary” on
for detailed information.
for detailed information.
ATtiny4/5/9/10
“Instruction Set Summary”
for detailed
for detailed
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