NUC120LD2BN Nuvoton Technology Corporation of America, NUC120LD2BN Datasheet - Page 528
![IC MCU 32BIT 64KB FLASH 48LQFP](/photos/28/73/287352/nuc120ld2bn_sml.jpg)
NUC120LD2BN
Manufacturer Part Number
NUC120LD2BN
Description
IC MCU 32BIT 64KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Specifications of NUC120LD2BN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
31
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUC120LD2BN
Manufacturer:
NuvoTon
Quantity:
64
Company:
Part Number:
NUC120LD2BN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
- NUC100LC1BN PDF datasheet
- NUC100LC1BN_PRODUCT_CHANGE PDF datasheet #2
- NUC120LC1BN PDF datasheet #3
- NUC120LC1BN PDF datasheet #4
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PDMA Current Byte Count Register (PDMA_CBCRx)
Register
PDMA_CBCR0
PDMA_CBCR1
PDMA_CBCR2
PDMA_CBCR3
PDMA_CBCR4
PDMA_CBCR5
PDMA_CBCR6
PDMA_CBCR7
PDMA_CBCR8
Notice: Low Density only support PDMA channel 0.
Bits
[31:16]
[15:0]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Descriptions
Reserved
PDMA_CBCR
Offset
PDMA_BA_ch0+0x1C R
PDMA_BA_ch1+0x1C R
PDMA_BA_ch2+0x1C R
PDMA_BA_ch3+0x1C R
PDMA_BA_ch4+0x1C R
PDMA_BA_ch5+0x1C R
PDMA_BA_ch6+0x1C R
PDMA_BA_ch7+0x1C R
PDMA_BA_ch8+0x1C R
30
22
14
6
Reserved
PDMA Current Byte Count Register (Read Only)
This field indicates the current remained byte count of PDMA.
Note: SW_RST will clear this register value.
29
21
13
5
R/W
PDMA_CBCR [15:8]
PDMA_CBCR [7:0]
Description
PDMA Current Byte Count Register CH0
PDMA Current Byte Count Register CH1
PDMA Current Byte Count Register CH2
PDMA Current Byte Count Register CH3
PDMA Current Byte Count Register CH4
PDMA Current Byte Count Register CH5
PDMA Current Byte Count Register CH6
PDMA Current Byte Count Register CH7
PDMA Current Byte Count Register CH8
28
20
12
4
- 528 -
Reserved
Reserved
27
19
11
3
Publication Release Date: Dec. 22, 2010
26
18
10
2
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
24
16
8
0
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