NUC120LD2BN Nuvoton Technology Corporation of America, NUC120LD2BN Datasheet - Page 120
![IC MCU 32BIT 64KB FLASH 48LQFP](/photos/28/73/287352/nuc120ld2bn_sml.jpg)
NUC120LD2BN
Manufacturer Part Number
NUC120LD2BN
Description
IC MCU 32BIT 64KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Specifications of NUC120LD2BN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
31
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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System Reset Source Register (RSTSRC)
This register provides specific information for software to identify this chip’s reset source from last
operation.
Register
RSTSRC
Bits
[31:8]
[7]
[6]
[5]
[4]
[3]
RSTS_CPU
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Descriptions
Reserved
RSTS_CPU
Reserved
RSTS_SYS
RSTS_BOD
RSTS_LVR
Offset
GCR_BA+0x04
Reserved
30
22
14
6
RSTS_SYS
R/W
R/W
Reserved
The RSTS_CPU flag is set by hardware if software writes CPU_RST (IPRSTC1[1]) 1 to
reset Cortex-M0 CPU kernel and Flash memory controller (FMC).
1 = The Cortex-M0 CPU kernel and FMC are reset by software setting CPU_RST to 1.
0 = No reset from CPU
Software can write 1 to clear this bit to zero.
Reserved
The RSTS_SYS flag is set by the “reset signal” from the Cortex_M0 kernel to indicate
the previous reset source.
1 = The Cortex_M0 had issued the reset signal to reset the system by software writing
1 to bit SYSRESETREQ(AIRCR[2], Application Interrupt and Reset Control Register,
address = 0xE000ED0C) in system control registers of Cortex_M0 kernel.
0 = No reset from Cortex_M0
Software can write 1 to clear this bit to zero.
The RSTS_BOD flag is set by the “reset signal” from the Brown-Out-Detector to
indicate the previous reset source.
1 = The BOD had issued the reset signal to reset the system
0 = No reset from BOD
Software can write 1 to clear this bit to zero.
The RSTS_LVR flag is set by the “reset signal” from the Low-Voltage-Reset controller
to indicate the previous reset source.
1 = The LVR controller had issued the reset signal to reset the system.
0 = No reset from LVR
29
21
13
5
Description
System Reset Source Register
RSTS_BOD
28
20
12
4
- 120 -
Reserved
Reserved
Reserved
RSTS_LVR
27
19
11
3
Publication Release Date: Dec. 22, 2010
RSTS_WDT
26
18
10
2
RSTS_RESE
25
17
9
1
T
Revision V1.06
Reset Value
0x0000_00XX
RSTS_POR
24
16
8
0
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