NUC120LC1BN Nuvoton Technology Corporation of America, NUC120LC1BN Datasheet - Page 233
![IC MCU 32BIT 32KB FLASH 48LQFP](/photos/28/73/287345/nuc120lc1bn_sml.jpg)
NUC120LC1BN
Manufacturer Part Number
NUC120LC1BN
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Specifications of NUC120LC1BN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUC120LC1BN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Part Number:
NUC120LC1BN
Manufacturer:
NUVOTON
Quantity:
20 000
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Buffer Segmentation Register (USB_BUFSEG)
For Setup token only.
Register
USB_BUFSEG
Bits
[31:9]
[8:3]
[2:0]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
USB_BA+0x018 R/W
Descriptions
Reserved
BUFSEG
Reserved
30
22
14
6
BUFSEG[7:3]
R/W
Reserved
It is used to indicate the offset address for the Setup token with the USB SRAM
starting address. The effective starting address is
USB_SRAM address + { BUFSEG[8:3], 3’b000}
Where the USB_SRAM address = USB_BA + 0x100h.
Note: It is used for Setup token only.
Reserved
29
21
13
5
Description
Setup Token Buffer segmentation Register
Reserved
28
20
12
4
- 233 -
Reserved
Reserved
27
19
11
3
Publication Release Date: Oct 22, 2010
26
18
10
2
Reserved
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
BUFSEG[8]
24
16
8
0
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