XRT75R03IVTR Exar Corporation, XRT75R03IVTR Datasheet - Page 74

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XRT75R03IVTR

Manufacturer Part Number
XRT75R03IVTR
Description
IC LIU E3/DS3/STS-1 3CH 128LQFP
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT75R03IVTR

Lead Free Status / RoHS Status
Contains lead / RoHS Compliant

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Exar Corporation
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XRT75R03
REV. 1.0.8
B
IT
N
5
UMBER
Digital LOS Defect
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
Declared
N
AME
T
R/O
YPE
D
V
EFAULT
ALUE
0
71
Digital LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the
Digital LOS (Loss of Signal) detector is declaring the LOS
Defect condition.
For DS3 and STS-1 applications, the Digital LOS Detector
will declare the LOS Defect condition whenever it detects
an absence of pulses (within the incoming DS3 or STS-1
data-stream) for 160 consecutive bit-periods.
Further, (again for DS3 and STS-1 applications) the Digital
LOS Detector will clear the LOS Defect condition when-
ever it determines that the pulse density (within the incom-
ing DS3 or STS-1 signal) is at least 33%.
0 - Indicates that the Digital LOS Detector is NOT declaring
the LOS Defect Condition.
1 - Indicates that the Digital LOS Detector is currently
declaring the LOS Defect condition.
N
OTES
1. LOS Detection (within each channel of the
2. The current LOS Defect Condition (for the
:
XRT75R03) is performed by both an Analog LOS
Detector and a Digital LOS Detector. The LOS
state of a given Channel is simply a WIRED-OR
of the LOS Defect Declare states of these two
detectors.
channel) can be determined by reading out the
contents of Bit 1 (Receive LOS Defect Declared)
within this register.
D
ESCRIPTION
xr
xr
xr
xr

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