XRT75R03IVTR Exar Corporation, XRT75R03IVTR Datasheet - Page 14

• Manufacturer Part Number: XRT75R03IVTR
• Description: IC LIU E3/DS3/STS-1 3CH 128LQFP
• Manufacturer: Exar Corporation

Specifications of XRT75R03IVTR

• Lead Free Status / RoHS Status: Contains lead / RoHS Compliant

SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS
XRT75R03
REV. 1.0.8
P
113
114
57
52
56
51
75
95
84
IN
#
RNEG_0/LCV_0
RNEG_1/LCV_1
RNEG_2/LCV_2
S
IGNAL
REQEN_0
REQEN_1
REQEN_2
RxClk_0
RxClk_1
RxClk_2
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
N
AME
T
YPE
O
O
I
Receive Negative Data Output/Line Code Violation Indicator -
Channel 0:
Receive Negative Data Output/Line Code Violation Indicator -
Channel 1:
Receive Negative Data Output/Line Code Violation Indicator -
Channel 2:
The function of these pins depends on whether the XRT75R03 is configured in
Single Rail or Dual Rail mode.
Dual-Rail Mode - Receive Negative Polarity Data Output
If the channel/device has been configured to operate in the Dual-Rail Mode,
then all negative-polarity data will be output via this output pin. The positive-
polarity data will be output via the corresponding RPOS_n output pin. In other
words, the Receive Section of the corresponding Channel will pulse this output
pin "High" for one period of RCLK_n anytime it receives a negative-polarity
pulse via the RTIP/RRING input pins.
The data that is output via this pin is updated upon a user-selectable edge of
the RCLK_n output clock signal.
Single-Rail Mode - Line Code Violation Indicator Output
If the channel/device has been configured to operate in the Single-Rail Mode,
then this particular output pin will function as the Line Code Violation indicator
output.
In this configuration, the Receive Section of the Channel will pulse this output
pin "High" for at least one RCLK period whenever it detects either an LCV (Line
Code Violation) or an EXZ (Excessive Zero Event).
The data that is output via this pin is updated upon a user-selectable edge of
the RCLK_n output clock signal.
Receive Clock Output - Channel 0:
Receive Clock Output - Channel 1:
Receive Clock Output - Channel 2:
This output pin functions as the Receive or recovered clock signal. All Receive
(or recovered) data will output via the RPOS_n and RNEG_n outputs upon the
user-selectable edge of this clock signal.
Additionally, if the device/channel has been configured to operate in the Single-
Rail Mode, then the RNEG_n/LCV_n output pins will also be updated upon the
user-selectable edge of this clock signal.
Receive Equalization Enable Input - Channel 0:
Receive Equalization Enable Input - Channel 1:
Receive Equalization Enable Input - Channel 2:
These input pins are used to either enable or disable the Receive Equalizer
block within the Receive Section of the corresponding channel.
"Low" - Disables the Receive Equalizer within the corresponding channel.
"High" - Enables the Receive Equalizer within the corresponding channel.
N
OTES
1. For virtually all applications, it is recommend that this input pin be
2. This input pin ignored and should be tied to GND if the XRT75R03
3. These input pins are internally pulled low.
:
pulled "High" and enable the Receive Equalizer.
device has been configured to operate in the Host Mode.
11
D
ESCRIPTION
xr
xr
xr
xr