AS3977-BQFT austriamicrosystems, AS3977-BQFT Datasheet - Page 33

• Manufacturer Part Number: AS3977-BQFT
• Description: IC RF TRANSMITTER FSK 16-QFN
• Manufacturer: austriamicrosystems

Specifications of AS3977-BQFT

• Frequency: 300MHz ~ 928MHz
• Applications: ISM
• Modulation Or Protocol: FSK
• Data Rate - Maximum: 100 kbps
• Power - Output: 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Current - Transmitting: -

AS3977
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
LS (Low Power Supply Voltage)
Low power Supply voltage (LS) is a read/write bit, which indicates that the power amplifier supply voltage level
(VCCPA) is below a certain threshold voltage
threshold level (plus a hysteresis), this bit has to be reset to zero via SPI. The bit condition has no influence on the
operation of the IC. LS and LT monitor the VCCPA supply (they are only working if Voltage is applied to VCCPA). As
they are working with the same V
will never occur. LS is an indicator whereby LT switches off the PA hard coded.
MCCS, CLKS and PSC
These bits are used to set the micro controller clock functionality and to control the associated MCCLK bi-directional
and multi-functional pad.
MCCS stands for Micro Controller Clock output Selection and it declares how the MCCLK pad will be used. Depending
on the level of DATAIO by leaving the Power Down Mode, this setting can be left unchanged from the last written value
(DATAIO=1) or it can be set to the default value (DATAIO=0). Default MCCS value is “11” then the MCCLK pad is used
as output and the clock is always active.
CLKS stands for Clock Selection and it is used to select as MCCLK pre-scaler or baud rate output. Default value is the
pre-scaler output.
PSC stands for Pre-scaler and it is the two’s exponent for first crystal oscillator division ratio. Default value is “100” that
means a division ratio of 2
By leaving the Power Down Mode and if DATAIO is sampled LOW, these bits are set to their default values and then as
soon as the crystal oscillator is on, the MCCLK will be active and with a frequency that is 1/16 of the crystal oscillator
working frequency.
SETPD (Set Power Down)
This bit is used to force the circuit to go in Power Down Mode
the circuit is in Power Down Mode, this bit is reset to ZERO to avoid a dead lock condition. The Power Down Mode can
be reached by writing a ONE to this bit whenever a fast transition to the Power Down Mode is needed.
Output Frequency Setting
The output frequency f
Where:
P
f
M
N
AC
FRAC is the Fractional part
Predivider Division Ratio P and Pre Scaler Modulus M
The frequency band selection determines the value of the predivider division ratio P and the setting of the pre scaler
modulus M. The setting of these values for the different frequency bands is given in
Table 24. P and M Values for Frequency Bands
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REF
Frequency Band
is the Predivider division ratio
is the N-counter division ratio
is the Reference frequency
is the Prescaler modulus
is the A-counter offset, AC determines together with FRAC the actual A-counter setting
315 MHz
433 MHz
868 MHz
915 MHz
RF
is given by:
4
= 16.
REF
f
RF
P
1
1
2
2
generator that will be supplied from VCCPA, an overlap of the threshold levels
=
P f
⋅
(see Table
REF
⋅
(
M N
Revision 3.5
⋅
13). After an increase of the power supply voltage above the
+
M
4
5
5
5
AC
(see Software Power Down Method on page
+
FRAC
)
BSEL<1:0>
0 (00)
1 (01)
2 (10)
3 (11)
Table
24.
300 – 320 MHz
425 – 450 MHz
865 – 870 MHz
902 – 928 MHz
Note
26). When
33 - 45
(EQ 2)