AS3977-BQFT austriamicrosystems, AS3977-BQFT Datasheet - Page 25

• Manufacturer Part Number: AS3977-BQFT
• Description: IC RF TRANSMITTER FSK 16-QFN
• Manufacturer: austriamicrosystems

Specifications of AS3977-BQFT

• Frequency: 300MHz ~ 928MHz
• Applications: ISM
• Modulation Or Protocol: FSK
• Data Rate - Maximum: 100 kbps
• Power - Output: 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Current - Transmitting: -

AS3977
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Transmitting Data
Command code has to be provided from LSB to MSB and for transmit it is <C0, C1> = “11”. After the command code,
further configuration has to be provided from the MSB to the LSB. Then a bit-stream, the data to be sent, can be
transferred from the SDI master by keeping SDI enable signal to high. No SDI clock is required for data
synchronization or the input bit stream.
Each bit of the command and address sections of the frame have to be driven by the SDI master on the SDI clock
transfer edge and the SDI slave on the next SDI clock edge samples it.
The transmission starts as follows:
After the last configuration bit has been sampled, the micro controller has to provide an additional SDI clock edge to
activate the output amplifier. This allows the SDI state machine to switch to the TX status and to activate MCCLK.
Then, together with the first TX data bit, the next SDI clock sampling edge provided by the master starts the
transmission itself and powers on the analog output driver.
In case, the MCCLK output is properly configured, the transmission will be stopped by the microcontroller by setting
the clock to a high impedance state and the MCCLK output of the Transceiver became active and takes over the
communication of the Interface.
The power amplifier is switched on (if not already on) at the subsequent sampling edge of CLK after receiving the
transmit command byte. This allows to delay the PAON signal, e.g. to enable locking of the PLL in case a channel hop
has to be performed.
The following figure
active during TX. It is important to note in this mode the sequence of events labelled 1-4 in the diagram, which lead to
transmission. This mode allows the baud clock to be synchronized to the external data. In such a case, the
synchronization (A5=1) bit should be set within the transmitter configuration.
Figure 12. Transmit Command with MCCLK Active During Tx (falling edge sampling)
Transmitter Control States
Power Down State
When the Power Down Mode is entered, the crystal oscillator ends running and two very important bits of the registers
are set to their inactive values:
1. Lock transmit: which is set (1) during PD to forbid any transmission.
2. Setpd: it is reset (0) to avoid a locked Power Down Mode.
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ENABLE
DATAIO
MCCLK
CLK
1
(Figure
1
12) shows an example (sampling falling edge) of the transmit command with MCCLK
Tx configuration parameter ready
A5
A4
A3
A2
A1
Revision 3.5
A0
1
2
4
3
Tx Configuration and pre-configuration
uController triggers falling edge of CLK
MCLK started synchronous to
Power Amplifier is switched on
after rising edge of MCLK
internal baud clock
Data to be sent
for MCLK set
switched off or data is
Power Amplifier is
sent continuously
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