SX1223I073TRT Semtech, SX1223I073TRT Datasheet - Page 3

• Manufacturer Part Number: SX1223I073TRT
• Description: IC TX UHF 433/868/916 MHZ 24TQFN
• Manufacturer: Semtech

Specifications of SX1223I073TRT

• Frequency: 425 ~ 475MHz / 850 ~ 950MHz
• Applications: AMR, Home Automation, HQ Music and Data
• Modulation Or Protocol: FSK
• Data Rate - Maximum: 153.6 kbps
• Power - Output: 10dBm
• Current - Transmitting: 25.8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-TQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Other names: SX1223I073TR

The SX1223 is a single chip transmitter operating in the 433, 868 and 915MHz license free ISM (Industrial Scientific
and Medical) frequency bands; the frequency range is selectable between 425-475 MHz and 850-950 MHz. The
modulation scheme is 2-FSK. The circuit has 4 functional modes: sleep mode, where all the blocks are switched off,
standby mode, where only the crystal oscillator is on, synthesizer mode, where the frequency synthesizer is running,
and transmission mode, where all the blocks are on, including the power amplifier. It complies with European (ETSI
EN 300-220-1) and North American (FCC part 15) regulations.
There are three different methods of modulation:
The circuit works on two selectable supply voltage ranges:
A 3-wire bi-directional bus is used to communicate with SX1223 and gives access to the configuration register. An
output clock of 1 MHz is user selectable for driving an external micro-controller.
SX1223 comes in a RoHS green TQFN-24 package (body size: 4 mm x 4 mm).
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© Semtech 2007
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RFOUT
FUNCTIONAL BLOCK DIAGRAM
VDDP
(mw1) pulling the VCO in closed loop: all the specified bit rates can be implemented, but a DC-free coding
scheme is needed (e.g. Manchester), which means that the real information rate is half the bit rate,
(mw2) pulling the VCO in open loop: all the specified bit rates can be implemented, and NRZ coding is
allowed; but, since the control voltage of the VCO will drift due to leakage currents, the duration of the
transmission is limited,
(mw3) switching between two frequency divider ratios in closed loop; bit rates from 1.2 to 19.2 kbit/s are
achievable with this method.
(sv1) the high range (2.2 V to 3.6 V), where the on-chip regulators are activated,
(sv2) the low range (2.0 V to 2.5 V), where the on-chip regulators are off.
VDD
LDO
BIAS
PA
LDO
VDDF
CLOCK
GEN
XTA
2
2
OSCILLATOR
CRYSTAL
÷
Figure 1: SX1223 block diagram
XTB
M
N,A
N,A
VDDD
LD
DETECT
PFD
PFD
LOCK
LDO
2
2
3
VDD
CPOUT
MOD
VCO
VCO
LOOP FILTER
Open Loop
OPAMP
SX1223
VARIN
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SX1223
SO
SI
EN
SCK
DATAIN
DCLK
CLKOUT