SX1223I073TRT Semtech, SX1223I073TRT Datasheet - Page 19

• Manufacturer Part Number: SX1223I073TRT
• Description: IC TX UHF 433/868/916 MHZ 24TQFN
• Manufacturer: Semtech

Specifications of SX1223I073TRT

• Frequency: 425 ~ 475MHz / 850 ~ 950MHz
• Applications: AMR, Home Automation, HQ Music and Data
• Modulation Or Protocol: FSK
• Data Rate - Maximum: 153.6 kbps
• Power - Output: 10dBm
• Current - Transmitting: 25.8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-TQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Other names: SX1223I073TR

5.2.3
“1” should be written in Prescal_s register to operate SX1223 PLL dividers.
In most applications, the user has only to be concerned with the parameters given in sections 5.2.1 and 5.2.2.
However some options and test modes are available for special purposes. They are described in the tables below.
The two VCO_freq bits have to be programmed by the user according to the selected frequency band, whereas the
three VCO_IB bits can be either forced by the user or set automatically by the circuit which will select the
combination having the best phase noise. This automatic setting can be enabled by setting the three VCO_IB bits to
‘0’.
© Semtech 2007
Add Bits
Add Bits
Add Bits
Add Bits
Add Bits
Add
Add Bits
16
16
3
3
4
4
5
7-3
2-0
5-3
2-0
5-0
Optional and Test Parameters
7-5
Bit
4
Prescal_s
RefClk_K Comments
VCO_IB2
MOD_A
MOD_F
MOD_I
1..31
1..63
BRn
0..4
0..5
0..3
0
1
1
1
0
0
Comments
The deviation frequency is linearly dependent of MOD_I
Comments
Frequency deviation attenuator (or range selector). The attenuations are
(values 0 through 4, respectively)
Comments
The bit rate clock is set by dividing the crystal oscillator frequency by
RefClk_K*2^(3+BRn)
Comments
Programmable smoothing filter after attenuator. This can be programmed in
four steps, and will produce reasonable results for the highest bit rates.
The crystal oscillator is divided by this number to produce modulator clock and
it is divided further down by 2^(3+BRn) to produce the bit rate clock.
State
VCO_IB1
Prescaler enabled
Table 24: Modulator attenuator setting for frequency deviation
Table 23: Modulator current setting for frequency deviation
1
0
1
0
(default)
Table 27: Modulator and Bit Rate clock setting
VCO_IB0 Comments - default = [0 0 1]
Table 26: Modulator filter setting
Table 28: Prescaler enable bit
1
1
1
0
Table 25: Bit Rate setting
Table 29: VCO bias
Comments
Bias setting for 850 MHz
Bias setting for 868 MHz
Bias setting for 915 MHz
Bias setting for 950 MHz
19
f
1
RF
1
,
M
1
2
2 (
,
1
f
FreqBand
XCO
4
Reserved.
,
1
8
, and
)
(
16
N
1
16
A
)
.
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SX1223