SN260Q STMicroelectronics, SN260Q Datasheet - Page 23

• Manufacturer Part Number: SN260Q
• Description: IC ZIGBEE/802.15.4 PROC 40-QFN
• Manufacturer: STMicroelectronics

Specifications of SN260Q

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4
• Applications: ZigBee™
• Power - Output: -32dBm ~ 5dBm
• Sensitivity: -97.5dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 35.5mA
• Current - Transmitting: 35.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-QFN
• For Use With: 497-6404 - BOARD EVAL SPZB260 MOD FOR STR9497-5990 - KIT EVAL REVA FOR ZIGBEE497-5879 - NETWORK DEVELOPMENT FOR SN260497-5877 - KIT RADIO CARRIER FOR SN260
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Data Rate - Maximum: -

SN260
7.2.1
7.2.2
7.2.3
7.2.4
Command section
The Host begins the transaction by asserting the Slave Select and then sending a command
to the SN260. This command can be of any length from 2 to 136 bytes and must not begin
with 0xFF. During the Command section, the SN260 will respond with only 0xFF. The Host
should ignore data on MISO during the Command section. Once the Host has completed
transmission of the entire message, the transaction moves to the Wait section.
Wait section
The Wait section is a period of time during which the SN260 may be processing the
command or performing other operations. Note that this section can be any length of time up
to 200 milliseconds. Because of the variable size of the Wait section, an interrupt-driven or
polling-driven method is suggested for clocking the SPI as opposed to a DMA method.
Since the SN260 can require up to 200 milliseconds to respond, as long as the Host keeps
Slave Select active, the Host can perform other tasks while waiting for a Response.
To determine when a Response is ready, use one of two methods:
●
●
The first method, clocking the SPI, is recommended due to simplicity in implementing.
During the Wait section, the SN260 will transmit only 0xFF and will ignore all incoming data
until the Response is ready. When the SN260 transmits a byte other than 0xFF, the
transaction has officially moved into the Response section. Therefore, the Host can poll for a
Response by continuing to clock the SPI by transmitting 0xFF and waiting for the SN260 to
transmit a byte other than 0xFF. The SN260 will also indicate that a Response is ready by
asserting the nHOST_INT signal. The falling edge of nHOST_INT is the indication that a
Response is ready. Once the nHOST_INT signal asserts, nHOST_INT will return to idle
after the Host begins to clock data.
Response section
When the SN260 transmits a byte other than 0xFF, the transaction has officially moved into
the Response section. The data format is the same format used in the Command section.
The response can be of any length from 2 to 136 bytes and will not begin with 0xFF.
Depending on the actual response, the length of the response is known from the first or
second byte and this length should be used by the Host to clock out exactly the correct
number of bytes. Once all bytes have been clocked, it is allowable for the Host to de-assert
chip select. Since the Host is in control of clocking the SPI, there are no ACKs or similar
signals needed back from the Host because the SN260 will assume the Host could accept
the bytes being clocked on the SPI. After every transaction, the Host must hold the Slave
Select high for a minimum of 1ms. This timing requirement is called the inter-command
spacing and is necessary to allow the SN260 to process a command and become ready to
accept a new command.
Asynchronous signaling
When the SN260 has data to send to the Host, it will assert the nHOST_INT signal. The
nHOST_INT signal is designed to be an edge-triggered signal as opposed to a level-
triggered signal; therefore, the falling edge of nHOST_INT is the true indicator of data
availability. The Host then has the responsibility to initiate a transaction to ask the SN260 for
its output. The Host should initiate this transaction as soon as possible to prevent possible
Clock the SPI until the SN260 transmits a byte other than 0xFF.
Interrupt on the falling edge of nHOST_INT.
SPI protocol
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