SN260Q STMicroelectronics, SN260Q Datasheet - Page 12

IC ZIGBEE/802.15.4 PROC 40-QFN

SN260Q

Manufacturer Part Number
SN260Q
Description
IC ZIGBEE/802.15.4 PROC 40-QFN
Manufacturer
STMicroelectronics
Datasheet

Specifications of SN260Q

Frequency
2.4GHz
Modulation Or Protocol
802.15.4
Applications
ZigBee™
Power - Output
-32dBm ~ 5dBm
Sensitivity
-97.5dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
35.5mA
Current - Transmitting
35.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
40-QFN
For Use With
497-6404 - BOARD EVAL SPZB260 MOD FOR STR9497-5990 - KIT EVAL REVA FOR ZIGBEE497-5879 - NETWORK DEVELOPMENT FOR SN260497-5877 - KIT RADIO CARRIER FOR SN260
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Data Rate - Maximum
-
Top-level functional description
5
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Top-level functional description
Figure 3
Figure 3.
The radio receiver is a low-IF, super-heterodyne receiver. It utilizes differential signal paths
to minimize noise interference, and its architecture has been chosen to optimize co-
existence with other devices within the 2.4GHz band (namely, IEEE 802.11g and Bluetooth).
After amplification and mixing, the signal is filtered and combined prior to being sampled by
an ADC.
The digital receiver implements a coherent demodulator to generate a chip stream for the
hardware-based MAC. In addition, the digital receiver contains the analog radio calibration
routines and control of the gain within the receiver path.
The radio transmitter utilizes an efficient architecture in which the data stream directly
modulates the VCO. An integrated PA boosts the output power. The calibration of the TX
path as well as the output power is controlled by digital logic. If the SN260 is to be used with
an external PA, the TX_ACTIVE signal should be used to control the timing of the external
switching logic.
The integrated 4.8 GHz VCO and loop filter minimize off-chip circuitry. Only a 24MHz crystal
with its loading capacitors is required to properly establish the PLL reference signal.
The MAC interfaces the data memory to the RX and TX baseband modules. The MAC
provides hardware-based IEEE 802.15.4 packet-level filtering. It supplies an accurate
symbol time base that minimizes the synchronization effort of the software stack and meets
the protocol timing requirements. In addition, it provides timer and synchronization
assistance for the IEEE 802.15.4 CSMA-CA algorithm.
shows a detailed block diagram of the SN260.
SN260 block diagram
SN260

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