SN260Q STMicroelectronics, SN260Q Datasheet - Page 22

IC ZIGBEE/802.15.4 PROC 40-QFN

SN260Q

Manufacturer Part Number
SN260Q
Description
IC ZIGBEE/802.15.4 PROC 40-QFN
Manufacturer
STMicroelectronics
Datasheet

Specifications of SN260Q

Frequency
2.4GHz
Modulation Or Protocol
802.15.4
Applications
ZigBee™
Power - Output
-32dBm ~ 5dBm
Sensitivity
-97.5dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
35.5mA
Current - Transmitting
35.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
40-QFN
For Use With
497-6404 - BOARD EVAL SPZB260 MOD FOR STR9497-5990 - KIT EVAL REVA FOR ZIGBEE497-5879 - NETWORK DEVELOPMENT FOR SN260497-5877 - KIT RADIO CARRIER FOR SN260
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Data Rate - Maximum
-
SPI protocol
7
7.1
Note:
7.2
22/47
SPI protocol
The SN260 low level protocol centers on the SPI interface for communication with a pair of
GPIO for handshake signaling.
Physical interface configuration
The SN260 supports both SPI Slave Mode 0 (clock is idle low, sample on rising edge) and
SPI Slave Mode 3 (clock is idle high, sample on rising edge) at a maximum SPI clock rate of
5MHz, as illustrated in
The convention for the waveforms in this document is to show Mode 0.
Figure 4.
The nHOST_INT signal and the nWAKE signal are both active low. The Host must supply a
pull-up resistor on the nHOST_INT signal to prevent errant interruptions during undefined
events such as the SN260 resetting. The SN260 supplies an internal pull-up on the nWAKE
signal to prevent errant interruptions during undefined events such as the Host resetting.
SPI transaction
The basic SN260 SPI transaction is half-duplex to ensure proper framing and to give the
SN260 adequate response time. The basic transaction, as shown in
of three sections: Command, Wait, and Response. The transaction can be considered
analogous to a function call. The Command section is the function call, and the Response
section is the return value.
Figure 5.
The SN260 looks like a hardware peripheral.
The SN260 is the slave device and all transactions are initiated by the Host (the
master).
The SN260 supports a reasonably high data rate.
SPI transfer format, Mode 0 and Mode 3
General timing diagram for a SPI transaction
Figure
4.
Figure
5, is composed
SN260

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