SX1231IMLTRT Semtech, SX1231IMLTRT Datasheet - Page 5

• Manufacturer Part Number: SX1231IMLTRT
• Description: IC 433/868/915MHZ TXRX 24-QFN
• Manufacturer: Semtech

Specifications of SX1231IMLTRT

• Frequency: 433MHz, 868MHz, 915MHz
• Data Rate - Maximum: 300kbps
• Modulation Or Protocol: FSK, GFSK, GMSK, MSK, OOK
• Applications: AMR, Home Automation, Security
• Power - Output: 13dBm
• Sensitivity: -118dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 16mA
• Current - Transmitting: 95mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-QFN
• Transmitting Current: 95mA
• Data Rate: 300Kbps
• Rf Ic Case Style: QFN
• No. Of Pins: 24
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Receiving Current: 16mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: SX1231IMLTR

SX1231
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
Index of Figures
Page
Figure 1. Block Diagram ................................................................................................................................................ 8
Figure 2. Pin Diagram .................................................................................................................................................... 9
Figure 3. Marking Diagram ............................................................................................................................................ 9
Figure 4. TCXO Connection ........................................................................................................................................ 16
Figure 5. Transmitter Block Diagram ........................................................................................................................... 19
Figure 6. Receiver Block Diagram ............................................................................................................................... 22
Figure 7. AGC Thresholds Settings ............................................................................................................................. 23
Figure 8. Cordic Extraction .......................................................................................................................................... 26
Figure 9. OOK Peak Demodulator Description ............................................................................................................ 27
Figure 10. Floor Threshold Optimization ..................................................................................................................... 28
Figure 11. Bit Synchronizer Description ...................................................................................................................... 29
Figure 12. FEI Process ................................................................................................................................................ 30
Figure 13. Optimized AFC (AfcLowBetaOn=1) ............................................................................................................ 31
Figure 14. Temperature Sensor Response ................................................................................................................. 32
Figure 15. Tx Startup, FSK and OOK .......................................................................................................................... 34
Figure 16. Rx Startup - No AGC, no AFC .................................................................................................................... 35
Figure 17. Rx Startup - AGC, no AFC ......................................................................................................................... 35
Figure 18. Rx Startup - AGC and AFC ........................................................................................................................ 35
Figure 19. Listen Mode Sequence (no wanted signal is received) .............................................................................. 37
Figure 20. Listen Mode Sequence (wanted signal is received) ................................................................................... 39
Figure 21. Auto Modes of Packet Handler ................................................................................................................... 40
Figure 22. SX1231 Data Processing Conceptual View ............................................................................................... 41
Figure 23. SPI Timing Diagram (single access) .......................................................................................................... 42
Figure 24. FIFO and Shift Register (SR) ..................................................................................................................... 43
Figure 25. FifoLevel IRQ Source Behavior .................................................................................................................. 44
Figure 26. Sync Word Recognition .............................................................................................................................. 45
Figure 27. Continuous Mode Conceptual View ........................................................................................................... 47
Figure 28. Tx Processing in Continuous Mode ............................................................................................................ 47
Figure 29. Rx Processing in Continuous Mode ........................................................................................................... 48
Figure 30. Packet Mode Conceptual View ................................................................................................................... 49
Figure 31. Fixed Length Packet Format ...................................................................................................................... 50
Figure 32. Variable Length Packet Format .................................................................................................................. 50
Figure 33. Unlimited Length Packet Format ................................................................................................................ 51
Figure 34. CRC Implementation .................................................................................................................................. 56
Figure 35. Manchester Encoding/Decoding ................................................................................................................. 56
Figure 36. Data Whitening ........................................................................................................................................... 57
Figure 37. POR Timing Diagram ................................................................................................................................. 73
Figure 38. Manual Reset Timing Diagram ................................................................................................................... 74
Figure 39. +13dBm Schematic .................................................................................................................................... 74
Figure 40. +17dBm Schematic .................................................................................................................................... 75
Figure 41. Package Outline Drawing ........................................................................................................................... 76
Rev 3 - April 2010
Page 5
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