SX1231IMLTRT Semtech, SX1231IMLTRT Datasheet - Page 49

• Manufacturer Part Number: SX1231IMLTRT
• Description: IC 433/868/915MHZ TXRX 24-QFN
• Manufacturer: Semtech

Specifications of SX1231IMLTRT

• Frequency: 433MHz, 868MHz, 915MHz
• Data Rate - Maximum: 300kbps
• Modulation Or Protocol: FSK, GFSK, GMSK, MSK, OOK
• Applications: AMR, Home Automation, Security
• Power - Output: 13dBm
• Sensitivity: -118dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 16mA
• Current - Transmitting: 95mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-QFN
• Transmitting Current: 95mA
• Data Rate: 300Kbps
• Rf Ic Case Style: QFN
• No. Of Pins: 24
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Receiving Current: 16mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: SX1231IMLTR

Note
5.5.2. Packet Format
5.5.2.1. Fixed Length Packet Format
Fixed length packet format is selected when bit PacketFormat is set to 0 and PayloadLength is set to any value greater
than 0.
In applications where the packet length is fixed in advance, this mode of operation may be of interest to minimize RF
overhead (no length byte field is required). All nodes, whether Tx only, Rx only, or Tx/Rx should be programmed with the
same packet length value.
The length of the payload is limited to 255 bytes if AES is not enabled else the message is limited to 64 bytes (i.e. max 65
bytes payload if Address byte is enabled).
The length programmed in PayloadLength relates only to the payload which includes the message and the optional
address byte. In this mode, the payload must contain at least one byte, i.e. address or message byte.
An illustration of a fixed length packet is shown below. It contains the following fields:
Rev 3 - April 2010
ADVANCED COMMUNICATIONS & SENSING
Preamble (1010...)
Sync word (Network ID)
Optional Address byte (Node ID)
Message data
Optional 2-bytes CRC checksum
Data
The Bit Synchronizer is automatically enabled in Packet mode.
Tx
Rx
SYNC
RECOG.
PACKET
HANDLER
Figure 30. Packet Mode Conceptual View
CONTROL
Page 49
FIFO
(+SR)
SPI
DATASHEET
www.semtech.com
SCK
MISO
NSS
MOSI
SX1231
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5