SX1211I084TRT Semtech, SX1211I084TRT Datasheet - Page 73

• Manufacturer Part Number: SX1211I084TRT
• Description: IC SNGL-CHIP TXRX 32-TQFN
• Manufacturer: Semtech

Specifications of SX1211I084TRT

• Frequency: 860 ~ 960MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: AMR, ISM, Security and Access
• Power - Output: 12.5dBm
• Sensitivity: -113dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Modulation Type: FSK/OOK
• Package Type: TQFN EP
• Operating Supply Voltage (min): 2.1V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: SX1211I084TRT

It is recommended that this reference design (i.e. schematics, placement, layout, BOM,) is replicated in the final
application board to guarantee optimum performance.
The reference design area is represented by the dashed rectangle. C12 is a DC blocking capacitor which protects
the SAW filter. It has been added for debug purposes could be removed for a direct antenna connection if there is
no DC bias is expected at the antenna port. Please note that C10 and C11 are not used.
As illustrated in figures below, the layout has the following characteristics:
Rev 7 – Sept 2
ADVANCED COMMUNICATIONS & SENSING
7.5. Reference Design
very compact (9x19mm) => can be easily inserted even on very small PCBs
standard PCB technology (2 layers, 1.6mm, std via & clearance) => low cost
Its performance is quasi-insensitive to dielectric thickness => minimal design effort to transfer to other PCB
technologies (thickness, # of layers, etc...)
7.5.1. Application Schematic
7.5.2. PCB Layout
nd
, 2008
Figure 56: Reference Design Circuit Schematic
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