SX1210I084T Semtech, SX1210I084T Datasheet - Page 50

• Manufacturer Part Number: SX1210I084T
• Description: IC SINGLE-CHIP RECEIVER 32-TQFN
• Manufacturer: Semtech

Specifications of SX1210I084T

• Frequency: 863MHz ~ 960MHz
• Sensitivity: -113dBm
• Data Rate - Maximum: 200 kbps
• Modulation Or Protocol: FSK, OOK
• Applications: Alarm Systems, Communication Systems
• Current - Receiving: 3mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2.1 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -

Rev 2– Sept 8
ADVANCED COMMUNICATIONS & SENSING
Data_mode_1
IF_gain
Freq_dev
Res
BR
OOK_
floor_thresh
Fifo_size
Fifo_thresh
R1
P1
S1
R2
P2
S2
Res
th
, 2008
2
1-0
7-0
7
6-0
7-0
7:6
5-0
7-0
7-0
7-0
7-0
7-0
7-0
7-5
1
1
2
3
3
4
5
5
6
7
8
9
10
11
12
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
Data operation mode’s MSB. Cf. Data_mode_0 (Bit 5 Addr 1)
Gain on the IF chain:
00
01
10
11
Single side frequency deviation:
Fdev =
(d): D = “00000011” => Fdev = 100 kHz
Reserved
(d): “0”
Bit Rate =
(d): C = “0000111” => Bit Rate = 25 kb/s NRZ
Floor threshold in OOK Rx mode. By default 6 dB.
(d): “00001100” assuming 0.5 dB RSSI step
FIFO size selection:
00
01
10
11
FIFO threshold for interrupt source (Cf section 5.2.2.3)
(d): B = “001111”
R counter, active when RPS_select=”0”
(d):77h; default values of R1, P1, S1 generate 915.0 MHz in FSK mode
P counter, active when RPS_select=”0”
(d): 64h; default values of R1, P1, S1 generate 915.0 MHz in FSK mode
S counter, active when RPS_select=”0”
(d): 32h; default values of R1, P1, S1 generate 915.0 MHz in FSK mode
R counter, active when RPS_select=”1”
(d): 74h; default values of R2, P2, S2 generate 920.0 MHz in FSK mode
P counter, active when RPS_select=”1”
(d): 62h; default values of R2, P2, S2 generate 920.0 MHz in FSK mode
S counter, active when RPS_select=”1”
(d): 32h; default values of R2, P2, S2 generate 920.0 MHz in FSK mode
Reserved
(d): “00111000”
Data_mode_1
Bit 2 addr 1
maximal gain (0dB) (d)
-4.5 dB
-9dB
-13.5 dB
16 bytes (d)
32 bytes
48 bytes
64 bytes
32
0
0
1
Page 50 of 73
⋅
64
f
(D
XTAL
f
⋅
XTAL
(C
+
1)
+
Data_mode_0
Bit 5 addr 1
, 0 ≤ D ≤ 255, where D is the value in the register.
1)
, 0 ≤ C ≤ 127, where C is the value in the register.
0
1
x
Data Operation
Mode
Continuous (d)
Buffered
Packet
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