MPC8377EWLANA Freescale Semiconductor, MPC8377EWLANA Datasheet - Page 125

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MPC8377EWLANA

Manufacturer Part Number
MPC8377EWLANA
Description
ACCESS POINT/ROUTER MPC8377
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8377EWLANA

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
Revision
1
0
02/2009 • In
12/2008 Initial public release.
Date
• In
• In
• In
• In
• In
• In
• Updated part numbering information in AF column in
• In
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
rows for SerDes. In addition, changed 666 to 667 MHz.
MHz.
DDR2 SDRAM Output AC Timing Specifications,” and
footnote to references to MVREF, MDQ, and MDQS, referencing AN3665, MPC837xE Design Checklist.
footnote 10 and added footnote 14.
addition, modified extended temperature information in notes 1 and 4.
Table
Table
Table
Table
Table
Table
Table
Table
13, “DDR2 SDRAM DC Electrical Characteristics for GV
3, “Recommended Operating Conditions,” added two new rows for 800 MHz, and created two
5, “MPC8378E Power Dissipation
21, updated t
72, “TePBGA II Pinout Listing,” added footnote to USBDR_STP_SUSPEND and modified
74, “Operating Frequencies for TePBGA II,” changed 667 to 800 MHz for core_clk.
80, “Example Clock Frequency Combinations,” added 800 MHz cells for e300 core.
85, “Available Parts (Core/DDR Data Rate),” added new row for 800/400 MHz.
Table 87. Document Revision History (continued)
DDKHCX
minimum value for 333 MHz to 2.40.
Substantive Change(s)
1
,” added Notes 4 and 5. In addition, changed 666 to 667
Table
Table
84, “Part Numbering Nomenclature.” In
72, “TePBGA II Pinout Listing,” added
DD
(typ) = 1.8 V,”
Document Revision History
Table
21, “DDR1 and
125

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