EM250-RCM-R Ember, EM250-RCM-R Datasheet - Page 72

• Manufacturer Part Number: EM250-RCM-R
• Description: EM250 RCM BOARD
• Manufacturer: Ember
• Type: Transceiver, 802.15.4/ZigBeer

Specifications of EM250-RCM-R

• Frequency: 2.4GHz
• For Use With/related Products: EM250
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 636-1023

EM250
SC2_DMACTRL [0x4418]
120-0082-000S
SC_TXDMARST
SC_RXDMARST
SC_TXLODB
SC_TXLODA
SC_RXLODB
SC_RXLODA
0-R
0-R
15
0
0
7
0-R
0-R
14
0
0
6
[5]
[4]
[3]
[2]
[1]
[0]
SC_TXDMARST
0-W
0-R
13
Setting this bit will reset the transmit DMA. The bit is autocleared.
Setting this bit will reset the receive DMA. This bit is autocleared.
Setting this bit loads DMA transmit buffer B addresses and starts the DMA controller proc-
essing transmit buffer B. This bit is autocleared when DMA completes. Writing a zero to this
bit will not have any effect. Reading this bit as one indicates DMA processing for buffer B is
active or pending. Reading this bit as zero indicates DMA processing for buffer B is complete
or idle.
Setting this bit loads DMA transmit buffer A addresses and starts the DMA controller proc-
essing transmit buffer A. This bit is autocleared when DMA completes. Writing a zero to this
bit will not have any effect. Reading this bit as one indicates DMA processing for buffer A is
active or pending. Reading this bit as zero indicates DMA processing for buffer A is complete
or idle.
Setting this bit loads DMA receive buffer B addresses and starts the DMA controller process-
ing receive buffer B. This bit is autocleared when DMA completes. Writing a zero to this bit
will not have any effect. Reading this bit as one indicates DMA processing for buffer B is
active or pending. Reading this bit as zero indicates DMA processing for buffer B is complete
or idle.
Setting this bit loads DMA receive buffer A addresses and starts the DMA controller process-
ing receive buffer A. This bit is autocleared when DMA completes. Writing a zero to this bit
will not have any effect. Reading this bit as one indicates DMA processing for buffer A is
active or pending. Reading this bit as zero indicates DMA processing for buffer A is complete
or idle.
0
5
SC_RXDMARST
0-W
0-R
12
0
4
Page 72
SC_TXLODB
0-RW
0-R
11
0
3
SC_TXLODA
0-RW
0-R
10
0
2
SC_RXLODB
0-RW
0-R
9
0
1
SC_RXLODA
0-RW
0-R
0
8
0