4320-DKDB2 Silicon Laboratories Inc, 4320-DKDB2 Datasheet - Page 13

KIT DEV TEST EZRADIO SI4320 RX

4320-DKDB2

Manufacturer Part Number
4320-DKDB2
Description
KIT DEV TEST EZRADIO SI4320 RX
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of 4320-DKDB2

Accessory Type
Test Card, Receiver, 434MHz
Wireless Frequency
434 MHz
Interface Type
SPI
Modulation
FSK, OOK
For Use With/related Products
EZRadio®
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
2. Frequency Setting Command
3. Receiver Setting Command
Bits 7-6 select the VDI (valid data indicator) signal:
Bits 5-4 LNA gain set:
Bits 3-1 control the threshold of the RSSI detector:
The RSSI threshold depends on the LNA gain, the real RSSI threshold can be calculated:
Bit 0 (en) enables the whole receiver chain when set. Enable/disable of the wake-up timer and the low battery detector are not affected by
this setting.
Note: Clock tail is not generated when the crystal oscillator is controlled by en bit.
Bit
bit
The 12-bit parameter of the Frequency Setting Command <f11 :
f0> has the value F. The value F should be in the range of 96 and
3903. When F is out of range, the previous value is kept. The
synthesizer center frequency f
15
15
1
1
RSSI
th
14
14
0
1
= RSSI
f
0
= 10 MHz * C1 * (C2 + F/4000)
13
13
1
0
setth
+ G
12
12
0
0
LNA
f11
11
11
0
0
can be calculated as:
d1
g1
f10
10
10
0
0
1
1
0
0
1
1
0
d0
g0
0
1
0
1
0
1
0
1
f9
9
9
0
r2
0
0
0
0
1
1
1
1
r1
f8
8
8
0
0
0
1
1
0
0
1
1
Data Quality Detector Output (DQD)
r0
d1
0
1
0
1
0
1
0
1
f7
7
7
G
LNA
Digital RSSI Out (DRSSI)
d0
Clock recovery lock
f6
6
6
(dB relative to max. G)
DRSSI && DQD
VDI output
RSSI
g1
f5
5
5
Reserved
Reserved
-14
-20
-6
0
setth
-103
-97
-91
-85
-79
-73
g0
f4
4
4
[dBm]
The constants C1 and C2 are determined by
the selected band as:
r2
f3
3
3
Band [MHz]
f2
r1
2
2
315
433
868
915
f1
r0
1
1
en
f0
0
0
C1
1
1
2
3
C2
31
43
43
30
C0C1h
A680h
POR
POR
Si4320
13

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