DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 30

• Manufacturer Part Number: DK-DEV-4SGX530N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-DEV-4SGX530N

• Contents: Board, Cable, Documentation, Power Supply
• For Use With/related Products: Stratix® IV GX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2714

6–6
Stratix IV GX FPGA Development Kit User Guide
1
1
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Because the Config tab requires that a specific design is running in the FPGA, writing
a 0 to SRST or changing the PSO value can cause the Board Test System to stop
running.
JTAG Chain
The JTAG chain control shows all the devices currently in the JTAG chain. The
Stratix IV GX device is always the first device in the chain.
Setting DIP switch SW6.1 to the off position includes the MAX II device in the JTAG
chain.
Flash Memory Map
The Flash memory map control shows the memory map of the flash memory device
on your board.
SRST—Resets the system and reloads the FPGA with a design from flash memory
based on the other MAX II register values. Refer to
Table 6–1
August 2010 Altera Corporation
Chapter 6: Board Test System
for more information.
Using the Board Test System