EVAL-ADM1066LFEBZ Analog Devices Inc, EVAL-ADM1066LFEBZ Datasheet - Page 23
![BOARD EVALUATION FOR ADM1066LF](/photos/9/8/90849/eval-adm1066lfeb_board_sml.jpg)
EVAL-ADM1066LFEBZ
Manufacturer Part Number
EVAL-ADM1066LFEBZ
Description
BOARD EVALUATION FOR ADM1066LF
Manufacturer
Analog Devices Inc
Specifications of EVAL-ADM1066LFEBZ
Main Purpose
Power Management, Power Supply Supervisor/Tracker/Sequencer
Embedded
No
Utilized Ic / Part
ADM1066
Primary Attributes
10 Channel Supervisor / Sequencer, 6 Voltage Output DACs
Secondary Attributes
GUI Programmable via SMBus (via USB)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WRITING TO THE DACs
Four DAC ranges are offered. They can be placed with midcode
(Code 0x7F) at 0.6 V, 0.8 V, 1.0 V, and 1.25 V. These voltages are
placed to correspond to the most common feedback voltages.
Centering the DAC outputs in this way provides the best use of
the DAC resolution. For most supplies, it is possible to place the
DAC midcode at the point where the dc-to-dc converter output
is not modified, thereby giving half of the DAC range to margin
up and the other half to margin down.
The DAC output voltage is set by the code written to the DACx
register. The voltage is linear with the unsigned binary number
in this register. Code 0x7F is placed at the midcode voltage, as
described previously. The output voltage is given by
where V
There are 256 DAC settings available. The midcode value is
located at DAC Code 0x7F as close as possible to the middle
of the 256 code range. The full output swing of the DACs is
+302 mV (+128 codes) and −300 mV (−127 codes) around the
selected midcode voltage. The voltage range for each midcode
voltage is shown in Table 10.
Table 10. Ranges for Midcode Voltages
Midcode
Voltage (V)
0.6
0.8
1.0
1.25
CHOOSING THE SIZE OF THE ATTENUATION
RESISTOR
The size of the attenuation resistor, R3, determines how much
the DAC voltage swing affects the output voltage of the dc-to-dc
converter that is being margined (see Figure 33).
Because the voltage at the feedback pin remains constant, the
current flowing from the feedback node to GND through R2 is
a constant. In addition, the feedback node itself is high impedance.
This means that the current flowing through R1 is the same as
the current flowing through R3.
DAC Output = (DACx − 0x7F)/255 × 0.6015 + V
OFF
is one of the four offset voltages.
Minimum Voltage
Output (V)
0.300
0.500
0.700
0.950
CONVERTER
DC-TO-DC
FEEDBACK
VIN
OUTPUT
GND
Figure 33. Closed-Loop Margining System Using the ADM1066
Maximum Voltage
Output (V)
0.902
1.102
1.302
1.552
R1
R2
ATTENUATION
RESISTOR, R3
OFF
Rev. D | Page 23 of 32
PCB
TRACE NOISE
DECOUPLING
CAPACITOR
VH/VPx/VXx
DACx
Therefore, a direct relationship exists between the extra voltage
drop across R1 during margining and the voltage drop across R3.
This relationship is given by the following equation:
where:
Δ V
V
V
This equation demonstrates that if the user wants the output
voltage to change by ±300 mV, then R1 = R3. If the user wants the
output voltage to change by ±600 mV, R1 = 2 × R3, and so on.
It is best to use the full DAC output range to margin a supply.
Choosing the attenuation resistor in this way provides the most
resolution from the DAC, meaning that with one DAC code
change, the smallest effect on the dc-to-dc converter output
voltage is induced. If the resistor is sized up to use a code such
as 27 decimal to 227 decimal to move the dc-to-dc converter output
by ±5%, it takes 100 codes to move 5% (each code moves the
output by 0.05%). This is beyond the readback accuracy of the
ADC, but it should not prevent the user from building a circuit
to use the most resolution.
DAC LIMITING AND OTHER SAFETY FEATURES
Limit registers (called DPLIMx and DNLIMx) on the device
offer the user some protection from firmware bugs that can
cause catastrophic board problems by forcing supplies beyond
their allowable output ranges. Essentially, the DAC code written
into the DACx register is clipped such that the code used to set
the DAC voltage is given by
DAC Code
= DACx,
= DNLIMx,
= DPLIMx,
In addition, the DAC output buffer is three-stated if
DNLIMx > DPLIMx. By programming the limit registers
this way, the user can make it very difficult for the DAC
output buffers to be turned on during normal system operation.
The limit registers are among the registers downloaded from
EEPROM at startup.
FB
DACOUT
ADM1066
OUT
MUX
is the voltage at the feedback node of the dc-to-dc converter.
ΔV
is the change in V
OUT
is the voltage output of the margining DAC.
ADC
DAC
=
MICROCONTROLLER
R1
R3
CONTROLLER
( V
DACx ≥ DNLIMx and DACx ≤ DPLIMx
DACx < DNLIMx
DACx > DPLIMx
(SMBus)
DEVICE
FB
− V
OUT
DACOUT
.
)
ADM1066